Abstract: A demultiplexer applies picture information to pixels arranged in an array of a display device having columns and rows. The demultiplexer includes transistor switches each having a control terminal, an input terminal and an output terminal. A first bus couples switch control signals to the control terminals of the switches. The conductors of a first bus extend in a region containing each of the switches to form a global bus arrangement. Local buses have each conductors coupled to the input terminals of the switches associated with the individual local bus. The output terminals of the switches associated with the individual local bus are coupled to corresponding, consecutively disposed column conductors of the array. The individual local bus has a section that crosses over the first bus and a second section extending between the crossover section and the input terminals of the associated switches.

Abstract: The invention proposes a novel technique for coding video for a plasma display panel, which aims to improve the use of rotating code. The method forming the subject of the invention carries out a coding of the highest grey level V1 over the entirety of the subscans while favouring the subscans whose illumination time is the lowest. The coding of the lowest grey level V2 is achieved using the common value COMMAX which results from the coding of the value V1 if the specific value SPEMAX is greater than the difference D of the grey levels. If SPEMAX is greater than the difference D, then the coding of the common value COMMIN corresponds to the lowest value V2.

Abstract: The invention provides a novel scanning technique aimed at reducing the phenomenon of contouring. The scanning technique of the invention consists in adding at least one redundant subscan SP0 to SP4. The purpose of the redundant subscans SP0 to SP4 is to place an additional illumination time which is privileged. The redundant subscan SP0 to SP4 thus introduced makes it possible to have a steady illumination time virtually independent of the grey level and therefore to minimize the high-weight switching effects.

Abstract: The invention is related to a new kind of dithering method for plasma display panels. In a former Europena Patent Application a dithering method for the plasma display technology has been presented that utilizes a 3-dimensional dither pattern for the repeated use in a video sequence. A first dimension corresponds to a number of video frames, a second dimension corresponds to a number of video lines, and a third dimension corresponds to a number of cells or pixels in a video line. It has been found that this dither pattern has for some video levels the drawback of a generating a noticeable pattern in homogenous surfaces on the screen that reduces the picture quality. In order to overcome this drawback the invention proposes a new degree of freedom for the dither pattern. Different dither patterns are provided for different entries in a number of least significant bits of the data word representing the input video level.

Abstract: An improved addressing scheme for plasma display panel control comprises partitioning the panel into a number of sections and splitting the addressing period into correspondingly small addressing periods for each section. By varying the time distance between successive addressing periods of the sections from one sub-field to the other, at least for the sub-fields with higher weights, a better spread of the energy input and output of the plasma display panel is achieved and the power supply circuit for the display panel may be constructed with less expensive components.

Abstract: With the new plasma display panel technology new kinds of artifacts can occur in video pictures due to the principle that brightness control is done with a modulation of small lighting pulses in a number of periods called sub-fields. These artifacts are commonly described as ‘dynamic false contour effect’. A technique called bit line repeat coding has been developed for reducing the false contour effect. According to this technique sub-field coding is done with common (CSF) and normal sub-fields (SF) where for the common sub-fields (CSF) identical entries in the sub-field code words of two or more corresponding pixels on two or more pixel lines are used. In this specific sub-field coding method some cases will occur in which an error has to be made due to the reduced flexibility in encoding produced by the need to have the same code on common sub-fields (CSF).

Abstract: Plasma Display Panels (PDP) are becoming more and more interesting for TV technology. Due to the larger size of PDPs, with larger viewing angle the large area flicker effect will become more serious in the future, in particular when handling 50 Hz video standards. This invention proposes a different sub-field organisation, with different coding, which reduces large area flicker artefact, and which includes grouping of sub-fields in two sub-field groups wherein the two sub-field groups are identical in terms of the most significant sub-fields and different in terms of the least significant sub-fields, and a sub-field coding process that distributes luminance weight symmetrically over the two sub-field groups so as to minimize the large area flicker luminance component.

Abstract: A video imaging apparatus comprises first and second cathode-ray tubes, each having an ultor electrode and a focus electrode. A power supply generates an ultor voltage, which may have a fluctuating voltage component produced by beam current variations, and which is coupled to first and second ultor electrodes of the first and second cathode-ray tubes. A high voltage amplifier generates a dynamic focus voltage component at a frequency related to a deflection frequency. A combining network combines the fluctuating voltage component and the dynamic focus voltage component to develop a combined, dynamic focus voltage. The combined, dynamic focus voltage is coupled to each of the first and second focus electrodes for developing from the combined, dynamic focus voltage each of a first dynamic focus voltage at the first focus electrode and a second dynamic focus voltage at the second focus electrode.

Abstract: In a television receiver, a dynamic, parabolic correction voltage for focusing is generated by way of a transformer whose primary winding is fed with the line deflection current or a line-frequency voltage and to whose secondary winding a capacitor is connected, which capacitor integrates the sawtooth-waveform current in the secondary winding into a parabolic voltage. New types of picture tubes require a correction voltage which does not have a parabolic profile, rather whose form corresponds approximately to the cross section through the center of a bathtub. It is an object to provide a simple circuit for generating such a bathtub-waveform correction voltage.

Abstract: A microcircuit includes core and other portions, which receive different supply voltages from disparate sources. An electrostatic discharge protection (ESD) circuit internally connects the lower and higher voltage terminals together with a diode, poled so that the diode conducts if the nominally lower voltage supply exceeds the higher voltage supply. If the high voltage supply fails or even drops below the value of the low voltage supply, the diode conducts, and current is drawn in an amount which may overheat the microcircuit. A shut-down circuit is provided for sensing the voltage of the higher-voltage source, and shutting down the lower-voltage source any time the higher-voltage source drops below either the actual voltage or nominal voltage of the lower value source.

Abstract: Electromagnetic deflection unit for color cathode-ray tubes, comprising a pair of horizontal deflection coils and a pair of vertical deflection coils, the saddle-shaped vertical deflection coils having a rear bundle on the electron-gun side and a front bundle located on the screen side, lateral conductor harnesses 120 connecting the two bundles so as to produce a main window in the intermediate region lying between these said bundles, the conductor harnesses being arranged so that, at the end of the main window 18, on the gun side, at least 98% of the lateral harness conductors lie within an angular aperture &THgr;m of between 60 and 80°. This arrangement of the conductors in the rear part of the window makes it possible to minimize the aberrations due to coma parabola so as to avoid the use of additional field shapers.

Abstract: A user selects a predefined aspect ratio format of an image displayed on a display screen. When a change in an aspect ratio format of an incoming signal occurs, that would, otherwise, produce a distorted image, a format controller automatically overrides the user's predefined aspect ratio for establishing a different image aspect ratio. Thereby, the distortion of the image is prevented.

Abstract: An autotransformer steps up the output of a high voltage amplifier for applying a drive signal to the focus electrode of a CRT. A parabolic signal is obtained or generated at a deflection frequency such as the horizontal scanning frequency and is applied as an input to the amplifier. The amplifier output is coupled to a center tap of the autotransformer. One winding is serially coupled to the focus electrode and the other winding is AC coupled by a capacitor to ground, in parallel with the amplifier output. The transformer steps up the amplifier output voltage and can reduce the voltage rating required of transistors in the amplifier.

Abstract: The battery-operated power supply unit, which comprises a switching transistor whose current terminals are connected in series with a battery, in the current path of the power supply unit, comprises a protective circuit, which is arranged across the current terminals of the switching transistor and evaluates the differential voltage across the switching transistor. The switching transistor is in particular a MOSFET with a parallel-connected internal diode. In the event of too high a differential voltage, the power supply unit or an appliance connected downstream is switched off, so that the switching transistor is not destroyed in the event of a fault.

Abstract: The protection circuit comprises a clamping circuit with a switching element for reducing a supply voltage in case of an over voltage condition, and a holding circuit for providing a holding current for the clamping circuit. The clamping circuit comprises a threshold circuit, which provides a switching voltage for a switching element when the supply voltage reaches an upper voltage limit. The switching element is connected to a charge capacitor, which provides the switching-on voltage for the switching transistor, and by reducing this supply voltage, the switching of the switching transistor is disabled. The holding circuit comprises in particular a capacitor, which is coupled via a resistor to the clamping circuit for providing an additional current in case of an over voltage condition.

Abstract: A method for power level control in a Plasma Display Panel with which the Peak White Enhancement Factor can be increased. The method includes the provision of a set of power level modes for the sub-field coding. To each power level mode a characteristic sub-field organization belongs. The sub-field organization is variable in respect to one or more of the following characteristics: the number of sub-fields the sub-field type the sub-field positioning the sub-field weight the sub-field pre-scaling a factor for the sub-field weights which is used to vary the amount of small pulses generated during each sub-field. The method includes the steps of determining a value which is characteristic for the power level of a video picture and selecting a corresponding power level mode for sub-field coding.

Abstract: A power supply for a video display tube includes a deflection transformer with a primary winding powered with a scan voltage which has a first value when displaying signal according to a first video standard and a second voltage when displaying video according to a second standard. A secondary winding of the transformer produces filament voltage for the display tube. A variable coupler couples the filament voltage to the filament of the picture tube in an amount established by a control signal. A memory produces a first control signal in response to the first scan voltage and a second control signal in response to the second scan voltage. The first and second control signals are selected so that the voltage coupled from the transformer to the filament is the same at both scan voltages.

Abstract: A horizontal deflection winding centering circuit includes a Darlington transistor and a diode. The Darlington transistor and diode form a non-linear network that is coupled in series with an inductor. The series arrangement of inductor and non-linear network is coupled in parallel with a horizontal deflection winding. The base voltage of the Darlington transistor is produced by a voltage divider coupled in a current path of the inductor current.

Abstract: A horizontal deflection circuit generates a horizontal deflection current in a deflection winding, during a trace interval and during a retrace interval of a deflection cycle. A transistor is responsive to a vertical rate parabola signal and to a negative feedback signal for producing a vertical rate parabolic modulation voltage at a collector of the transistor. A negative feedback network generates the feedback signal that is indicative of a current flowing in the transistor for increasing an output impedance at the collector of the transistor. An inductor is coupled to the collector of the transistor for producing in the inductor a modulation current to provide for side pincushion distortion correction in an East-West modulator.

Abstract: A horizontal deflection circuit output stage includes a trace capacitor for developing a trace voltage. A retrace capacitance is coupled to a deflection winding to form a retrace resonant circuit with the deflection winding, during a retrace interval of a deflection cycle. A rectifier for rectifying a retrace pulse voltage developed in the retrace capacitance. A switching transistor is coupled to the inductance and to the trace capacitor for applying the rectified retrace pulse voltage to the inductance to generate a current in the inductance. The inductance current is coupled to the trace capacitor, during the trace interval, to provide for linearity correction. The rectifier is coupled to the switching transistor for producing a rectified control signal at a control terminal of the switching transistor to cause a change of state in the switching transistor, during the retrace interval.