Patents Represented by Attorney Samuel G. Campbell

Find this attorney in the Justia Lawyer Directory

  • Secure exchange of IP cores
    Patent number: 7971072
    Abstract: A method and system are disclosed. The system includes a trusted loader. The method includes downloading an IP core from a vendor to a target device. The IP core is received in an encrypted form at the target device, which can be, for example, a programmable logic device.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: June 28, 2011
    Assignee: Xilinx, Inc.
    Inventors: Adam P. Donlin, Prasanna Sundararajan, Bernard J. New
  • Method and system for secure exchange of IP cores
    Patent number: 7788502
    Abstract: A method and system are disclosed. The system includes a trusted loader. The method includes downloading an IP core from a vendor to a target device. The IP core is received in an encrypted form at the target device, which can be, for example, a programmable logic device.
    Type: Grant
    Filed: March 10, 2005
    Date of Patent: August 31, 2010
    Assignee: Xilinx, Inc.
    Inventors: Adam P. Donlin, Prasanna Sundararajan, Bernard J. New
  • Method and system for a multi-channel add-compare-select unit
    Patent number: 7613990
    Abstract: A circuit for a multi-channel add-compare-select unit is disclosed. The circuit includes a compare unit and a datapath. The datapath is coupled to the compare unit, and includes a number of adder units, a selection unit (which is coupled to the adder units), and a number of clocked storage stages.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: November 3, 2009
    Assignee: Xilinx, Inc.
    Inventors: William A. Wilkie, David I. Lawrie, Elizabeth R. Cowie
  • Method and system for identifying essential configuration bits
    Patent number: 7406673
    Abstract: A method and system are disclosed. The method and system provide the ability to identify a configuration bit as an essential configuration bit. The identifying that is performed uses a configuration bit definition.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: July 29, 2008
    Assignee: Xilinx, Inc.
    Inventors: Cameron D. Patterson, Prasanna Sundararajan, Brandon J. Blodget, Scott P. McMillan
  • Method and system for generating a bitstream view of a design
    Patent number: 7343578
    Abstract: A method and system for generating a bitstream view of a programmable logic device (PLD) design are disclosed. The present invention allows for the correlation of a physical circuit description (e.g., one or more of a PLD design's essential configuration bits) and a logical circuit description (e.g., one or more of the logic elements that make up a PLD design), which can also be viewed as correlating one or more of the physical elements of the design's implementation in the PLD with one or more of the design's logical elements.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: March 11, 2008
    Assignee: Xilinx, Inc.
    Inventors: Cameron D. Patterson, Prasanna Sundararajan, Brandon J. Blodget, Scott P. McMillan