Abstract: An averaging detector having a first transistor having a first resistor connected across the base and emitter, a first capacitor connected in a signal input line and to the base of a second transistor, the collectors of the first and second transistors being connected to a positive voltage line and the base of the first transistor being connected to an output voltage line, together with the emitter of the second transistor via a second resistor, an inhibit switch comprising a third transistor being connected between the base of the second transistor and a zero voltage line, a third resistor and second capacitor being connected in parallel between the zero voltage line and the output voltage line, the arrangement being such that on application of a voltage greater than the threshold voltage of the first transistor successive positive and negative cycles alternately reverse bias and forward bias the first and second transistors to achieve a balance between the half cycle charging through the second resistor and

Abstract: In a data transmission system, for communicating messages between a base station and a plurality of mobile stations, each mobile station includes a radio frequency transceiver and a programmable data terminal for sending and receiving predeterminedly formatted digitally encoded messages. A keyboard subsystem and character display subsystem are controlled by a programmable microprocessor subsystem which also processes received and transmitted messages. A transmit and receive system clock interrupts the operation of the microcomputer to process messages. The messages include a cyclical redundant check byte as well as a control number byte. Characters which are not editable blink. A terminal status display line is provided and a message received character is also provided. The system sets the system clock period to be the same for all data rates. Automatic restart of the system is provided as well as a means for detecting and generating a pseudo-random message preamble.

Abstract: A tracking pulse detector comprising a feedback loop and means for adjustment of the detector bias to compensate for varying input signal levels whereby noise signals present at the input of the detector are maintained below the detector threshold thereby rendering the detector immune to false triggering. An AGC output is taken from a junction between resistors of a voltage divider and a capacitor is connected between the AGC output line and an OV line, the AGC voltage output being related to the total carrier level. The average current in the detector is kept approximately constant independently of supply and signal conditions and the feedback loops adjusts the DC bias of the detector to compensate for varying signal levels, thereby keeping any input noise signals below the detector threshold independent of the level of slow varying carriers. Any carrier level variation faster than the feedback loop time constants are detected.

Abstract: A radio receiver including an RF amplifier stage arranged to receive transmitted RF signals and noise signals from an antenna, a mixer stage for converting the RF signals to intermediate frequency (IF) signals and supplying the IF signals to a blanker gate receiving blanking signals from a blanking signal source, the gate normally passing IF signals to discriminator means to demodulate the IF signals to audio signals, but decoupling the mixer stage from the demodulator when the blanking signal is present. The audio signal output from the discriminator is applied to a noise squelch circuit which detects noise frequencies above a predetermined frequency. If the predetermined frequency is exceeded, a squelch signal is generated to block or mute the audio signals. In the present invention, the squelch circuit employs an averaging detector instead of a peak detector in order to eliminate short duration spikes in the squelch circuit.

Abstract: A dual mode antenna for a miniature radio transceiver includes a low profile loop antenna structure while mounted on a body and a high efficiency dipole antenna while held in the hand.

Abstract: A unitary die-cast for housing electronic circuits includes one or more compartments or cavities adapted to receive a circuit boards therein. A compartment with a cavity includes a post centrally located in the bottom and extending upwardly in the middle of the cavity. A fastening device, such as a screw, is used to forcibly affix a rigid but flexible cover onto the housing at the center post. The cast and the cover are made of electrically conductive but acoustically dampening material. When the cover is forcibly affixed to cover the cavity, the cover and the chassis provide an acoustically and microphonically dampened housing for the circuit placed therein. The cast includes a wall separating the compartments, and the wall has a cavity along the length thereof and substantially co-extensive therewith for providing a thermal separation between the compartments whereby the wall acts as a thermal insulator.

Abstract: A filter assembly for UHF or microwave frequency range includes a bottom cover plate, a top cover plate and an unitary cast multicell frame with each cell having a resonating rod integrally cast with the frame. Selected ones of the rod have taps which have been cast as integral parts of the single integrally cast multicell. Each tap may include a web cast as an integral part of the unitary cast frame, the webs being dimensioned to adjust the impedance ratio of RF energy coupled to the corresponding cell. The exterior of the top cover plate may have recesses adapted to receive circuit boards therein so that the taps to the resonating rods extending through the frame can be directly connected to the terminal of the circuit boards to eliminate cables to the circuits from the taps.

Abstract: A predetermined frequency alignment signal and a white noise source signal are alternately switched through the intermediate frequency amplifier stage (IF) of the receiver being aligned. A series connected integrating capacitor and tuning meter couple between the receiver's detector output and ground potential.In operation, during the interval of white noise being applied to the IF the tuning meter is shorted and the capacitor is charged to a net voltage V.sub.n which is representative of the center frequency of the IF. When the alignment signal is applied to the IF, the tuning meter short is removed and a signal V.sub.s appears across the capacitor-meter circuit, whereby the meter reading is indicative of V.sub.s -V.sub.n which represents relative receiver alignment.

Abstract: A plurality of up/down counters are controlled by a programmed digital reference signal. The combination of a high select signal and a high input signal causes any one of the counters to increment (up) by one count while a combination of a high select signal and a low input signal causes any one of the counters to decrement (down) one count. A threshold detector signals on output when a specific combination of the counters reaches a predetermined combination count signifying correlation of the programmed reference with the input tone over a predetermined number of cycles. The phase of the input may be determined by noting which of the counters reaches the predetermined threshold.

Abstract: An addressing circuitry for a dot matrix vertical scan plasma display includes a character row counter and a character column counter, a random access memory, a dot pattern generator, a parallel to series shift register, and a driver for the display. The addressing circuitry is responsive to a processor. Alpha-numeric digital characters to be displayed are read out of the memory in sequence in response to a sequence signal from the character row counter and the character column signal output. The words read out of the memory are converted into dot matrix pattern by the dot pattern generator and displayed on the plasma display via the parallel to serial shift register and driver. An offset adder is used when the number of character rows and the number of characters per row of the display are other than binary progression numbers in generating a sequence signal. The offset adder is interposed between the random access memory and the row and column outputs.

Abstract: A plurality of series inductors and shunt capacitors are provided between a radio transmitter and an antenna. The inductors and capacitors are arranged in binary increments and are inserted in, or withdrawn from the circuit via provided reed relays. A microprocessor activates the relays in one of several modes until the required degree of match is provided. The status of the relays is stored in provided memory such that upon tuning of the transmitter to the same channel a proper match condition can be established without resort to the matching program.

Abstract: A detector for detecting a delta modulated signal includes a timing circuit, a counter and a decoder arranged to detect a delta modulated signal in electrically noisy environment. The timing circuit is used to provide a timing signal of a predetermined time interval over which the counter counts the transitions present in the delta modulated signal. The counter is used for counting the digital bit occurrences of the delta modulated signal within the predetermined time interval. The decoder responds to the timing signal and receives the count signals from the counter and provides a binary signal of first state when the count signal indicates the number of bit occurrences of the delta modulated signal is above a predetermined high level of count or below a predetermined number of low count and provides a binary signal of a second state when the count signal indicates that the number of the digital bit occurrences occur between the predetermined high level of count and the predetermined low level of count.

Abstract: An apparatus for indicating the position of at least two rotatable mechanical elements in an indication field of a rotary switch, includes a pair of rotatable elements; an indication panel; a transparent dial skirt connected to each rotatable, each skirt having representative symbols arranged in an area along the outer periphery thereof for indicating the position of the rotatable elements and the areas of the skirt with the symbols overlapping in the indication panel.

Abstract: An array of antennas for a cellular RF communications system for providing communications to randomly placed transceivers in a given area. The antenna array includes a plurality of antenna sites located in the centers of cells. Each antenna site has a plurality of sectored antennas for providing a plurality of communication channels. A predetermined number of sites are used to constitute a subarray of cells to provide a set of communication channels and channel allocations are repeated from subarray to subarray. Channels are also so allocated as to minimize channel interference and optimize channel utilization. An omnidirectional antenna may be provided for each antenna site for signalling purposes.

Abstract: A telephone apparatus includes a handset with a heel and a head with a recess, a base having a first depressed part with a lip to receive and hold the heel of the handset and a second depressed part adapted to receive the head of the handset when the handset is placed on the base, a locking arm with a boss, the arm being pivotally mounted on the base and the boss being located on the arm at a distance from the pivot thereof and being positioned to mate with the recess of the head of the handset and a spring loaded lever mechanism pivotally mounted on the base for keeping the locking arm in a locking position whereby its boss is kept mated in the recess of the second part of the base. The lever mechanism is also adopted to move the locking arm to withdraw the boss away from the recess to a released position in response to an external pressure applied thereto to release the handset.

Abstract: A mechanism for sequentially feeding pins includes a collet having a longitudinal bore for feeding pins from one end to a second end, the second end holding the pins in position. The second end of the collet has at least one longitudinal slot contained therein, providing variations in the cross sectional area of the bore when the holding end of the collet is tightened around a pin. Pins are pushed through the center bore of the collet from a bottom feed point. Pins are positioned in an indexable disc having cutouts for containing the pins and delivering the pins one-by-one to the feed end of the collet bore. The disc cutouts are sequentially indexed by a ratchet and pawl mechanism. The collet can also be used to hold a pin for insertion into a hole in a printed circuit board and fastening of the pin to the printed circuit board by rolling over a portion of the pin with a punch, the punch being positioned coaxially with the collet bore.

Abstract: A circuit for correcting frequency errors in an incoming signal that includes a particular frequency signal. The circuit includes dual phase locked loop circuitry for providing a frequency feedback control, detecting circuitry for detecting the presence of the particular coded signal and generating a hold signal, and a sample and hold circuitry disposed in the feedback path of the phase locked loop circuitry and responsive to the hold signal for setting the feedback control at a particular value to provide an optimal frequency error correction for the particular frequency signal and for holding the feedback control at the particular value for the entire spectrum of the incoming signal, whereby the frequency feedback control set for the particular frequency tone is used for the entire spectrum of the incoming signal to minimize the error in the output frequencies of the circuit.

Abstract: A few cycles of an input signal are correlated, or compared, with a few cycles of the input signal received at a previous interval and the interval is varied when correlation, or a positive comparison, has been obtained with the apparatus providing an output or detection signal after a predetermined number of correlations have occurred.