Patents Represented by Attorney Sanjay S. Gadkari
  • Patent number: 7257809
    Abstract: An arrangement is provided for estimating type-cast sets of a program. Type-cast sets of a program are computed with respect to the declared types contained in the program.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: August 14, 2007
    Assignee: Intel Corporation
    Inventors: Rakesh Ghiya, David C. Sehr
  • Patent number: 7248285
    Abstract: A system, apparatus and method for automatically annotating digital images. An electronic capture device captures a digital representation of a scene. An information tag device is utilized to store identification data for identifying the scene. A tag-reader receives the identification data from the information tag device. A database stores information for the information tag device. A communication device communicates with the database. When identification data is transmitted to the database, information for an annotation provider is transmitted from the database to the communication device. A program executed by the communication device controls communication of the identification data with the database.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: July 24, 2007
    Assignee: Intel Corporation
    Inventor: Bradford H Needham
  • Patent number: 7213242
    Abstract: An arrangement is provided for eliminating partial redundancy. Original code is processed to perform run-time behavior preserving redundancy elimination. Partial redundancy is removed in a manner so that the run-time behavior of the original code is preserved.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: May 1, 2007
    Assignee: Intel Corporation
    Inventor: Arch Robison
  • Patent number: 7205915
    Abstract: The method disclosed may be used together with any prefix oriented decoding method to enable faster decoding of variable length codes when a subset of most frequently used codes with relatively short prefixes may be determined. An embodiment of the present invention reads a number of bits, not less than the maximal possible length of a code, from a bit stream. Then a predetermined number of bits is selected and used as an index to a data structure that contains at least a decoded value and a validity indicator, along with other pre-decoded data, namely: prefix type and length, maximal code length for a group of codes, actual code length, the number of bits to return to the bit stream, etc. The validity indicator is used to determine whether to proceed with the decoding operation, or obtain the valid decoded value from the data structure and return excess bits to the bit stream.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: April 17, 2007
    Assignee: Intel Corporation
    Inventors: Sergey Nikolaevich Zheltov, Stanislav Viktorovich Bratanov
  • Patent number: 7191353
    Abstract: A master device communicating a first range of speeds at which the master device is operable, to a first slave device, the master device and the first slave device determining a second range of speeds most closely matched to the first range of speeds at which each of the master device and the first slave device is respectively operable; and the master device setting the operating range of speeds of each of the master device and the first slave device to the second target range of speeds.
    Type: Grant
    Filed: March 31, 2003
    Date of Patent: March 13, 2007
    Assignee: Intel Corporation
    Inventor: Laurance F. Wygant
  • Patent number: 7177983
    Abstract: In a Constant Access Time Bounded (CATB) cache, if a dirty line in a search group of the cache is selected for eviction from the cache, marking the dirty line as evicted, selecting a replacement line from a reserve, and inserting the replacement line into the search group.
    Type: Grant
    Filed: August 12, 2003
    Date of Patent: February 13, 2007
    Assignee: Intel Corporation
    Inventor: Robert J. Royer
  • Patent number: 7174040
    Abstract: A procedure for fast training and evaluation of support vector machines (SVMs) with linear input features of high dimensionality is presented. The linear input features are derived from raw input data by means of a set of m linear functions defined on the k-dimensional raw input data. Training uses a one-time precomputation on the linear transform matrix in order to allow training on an equivalent training set with vector size k instead of m, given a great computational benefit in case of m>>k. A similar precomputation is used during evaluation of SVMs, so that the raw input data vector can be used instead of the derived linear feature vector.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: February 6, 2007
    Assignee: Intel Corporation
    Inventors: Rainer W. Lienhart, Jochen Maydt
  • Patent number: 7149354
    Abstract: A method of extracting a scene structure includes determining a plurality of image edges in an image, based on image gradients. A redundant edge is eliminated from the plurality of image edges. The plurality of image edges is linked into a planar graph. A broken edge is restored by a forced extension.
    Type: Grant
    Filed: December 12, 2002
    Date of Patent: December 12, 2006
    Assignee: Intel Corporation
    Inventor: Alexander V. Bovyrin
  • Patent number: 7146050
    Abstract: A procedure for fast training and evaluation image classification systems using support vector machines (SVMs) with linear input features of high dimensionality is presented. The linear input features are derived from raw image data by means of a set of m linear functions defined on the k-dimensional raw input data, and are used for image classification, including facial recognition tasks.
    Type: Grant
    Filed: July 19, 2002
    Date of Patent: December 5, 2006
    Assignee: Intel Corporation
    Inventors: Rainer W. Lienhart, Jochen Maydt