Patents Represented by Attorney, Agent or Law Firm Schwegman, Lundberg, Woesner & Kluth, P.A.
  • Patent number: 7249026
    Abstract: The present invention provides attorney terminals which operate using an outline for storing, associating and managing case evidence, case law and work product for a given lawsuit at issue. Accessed through attorney terminals, the outline is structured based on a hierarchical categorization of the lawsuit into the law and fact at issue. Associated with each categorization entry in the hierarchical outline are groupings of case law, case evidence, relevance and draft discovery information for rapid access by the attorney. Each categorization entry in the tailored outline provides instant access to case law via headnotes, treatise selections, seminal cases, and preset searches. The disclosed invention also automatically: 1) tracks the use of Exhibits in a proceeding; 2) generates draft portions of a pretrial order including jury instructions; and 3) generates time-lines for analysis and use during a proceeding. Draft interrogatories, document requests and deposition or trial questions are also provided.
    Type: Grant
    Filed: June 14, 1999
    Date of Patent: July 24, 2007
    Assignee: Engate LLC
    Inventors: James D. Bennett, Lawrence M. Jarvis
  • Patent number: 6727154
    Abstract: An inductor for an integrated circuit or integrated circuit package comprises a three-dimensional structure. In one embodiment the inductor is arranged on an integrated circuit substrate in at least two rows, each row comprising upper segments and lower segments, with the upper segments being longer than the lower segments. The upper segments in a first row are offset 180 degrees from those in an adjoining row to provide greater coupling of magnetic flux. The materials and geometry are optimized to provide a low resistance inductor for use in high performance integrated circuits. In another embodiment the inductor is arranged on an integrated circuit package substrate. Also described are methods of fabricating the inductor on an integrated circuit or as part of an integrated circuit package.
    Type: Grant
    Filed: September 10, 2002
    Date of Patent: April 27, 2004
    Assignee: Intel Corporation
    Inventor: Donald S. Gardner
  • Patent number: 6721594
    Abstract: Systems, devices, structures, and methods are provided to present a visual display based on data from an implantable medical device. The display includes a chart showing the frequency of a detected type of arrhythmia over a predetermined period of time.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: April 13, 2004
    Assignee: Cardiac Pacemakers, Inc.
    Inventors: Vickie L. Conley, Allan T. Koshiol
  • Patent number: 6684080
    Abstract: A system for channel assignment in a trunked transmission communication system including a plurality of subscribers. A plurality of subscribers is provided home channel assignment to reduce collisions. A home channel alias is provided for home channel coverage where a designated home channel is unavailable. A system for call grouping is provided to avoid talk group splitting. A first check is used to determine if other channels are conducting communications with identical home and talk group information. A second check is available after a temporary channel assignment. In one system both the home channel aliasing and call grouping are performed.
    Type: Grant
    Filed: April 10, 1998
    Date of Patent: January 27, 2004
    Assignee: Transcrypt International/E. F. Johnson Company
    Inventors: Keith W. Barnes, Rory A. Smith, Mervin L. Grindahl
  • Patent number: 6650587
    Abstract: A memory device includes an address selection circuit to store addresses of selected rows of memory cells. During a refresh mode, only the memory cells of the selected rows are refreshed. The addresses of the selected rows can be stored by a user or automatically.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: November 18, 2003
    Assignee: Micron Technology, Inc.
    Inventors: Scott J. Derner, Casey R. Kurth, Daryl L. Habersetzer
  • Patent number: 6520118
    Abstract: This invention relates to an animal actuated applicator (10) suitable for applying a fluid such as a pesticide to an animal, the applicator (10) comprising dispensing means (60) for dispensing the fluid and actuating means (12) for actuating the dispensing means. The actuating means (12) includes a base plate (16) which is in use displaced when the animal steps thereon, the degree of displacement being dependent proportionally on the animal's weight being transferred to the base plate (16). The actuating means (12) also includes at least one pressure lever (22) which is operatively associated with the base plate (16) and which is arranged to be displaced in response to the displacement of the base plate (16). An actuator is provided for actuating the dispensing means (60) in response to displacement of the pressure lever (22) to dispense a volume of fluid which is proportional to the animal's weight being transferred to the base plate (16).
    Type: Grant
    Filed: September 28, 2001
    Date of Patent: February 18, 2003
    Assignee: Bosluis Patente (EDMS.) Beperk
    Inventors: Willie Swiegers, Petrus Johannes A. N. Van Niekerk
  • Patent number: 6351849
    Abstract: A method for compiling comprising receiving a source program having a number of memory operation blocks that are mutually exclusive. Each of the memory operation blocks have a memory operation, such that the memory operation in each block is associated with a different memory address. Additionally, an executable program is generated based on the source program. The executable program includes an executable program section for each memory operation block of the source program such that each executable program section utilizes a same number of registers for each memory operation within each memory operation block.
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: February 26, 2002
    Assignee: Intel Corporation
    Inventor: William Y. Chen
  • Patent number: 6175526
    Abstract: A trap and delay pulse generator for command signals triggered off of a high speed clock allows a device to develop signals before initiating a function and to complete the function after the clock pulse expires and allows overlap of sequential functions. When a device receives a sequence of clock pulses triggering command signals it is necessary that the device complete the functions after the clock pulse expires before receiving a new command signal triggered off of a subsequent clock pulse. The trap and delay pulse generator latches the command signal triggered off of the clock pulse and delays it to ensure an operation is ready to proceed even if the clock signal expires before the present command is completed.
    Type: Grant
    Filed: January 31, 2000
    Date of Patent: January 16, 2001
    Assignee: Micron Technology, Inc.
    Inventor: Donald M. Morgan
  • Patent number: 6104604
    Abstract: A modular keyboard is provided which can be repeatedly and conveniently transferred between a portable computer or a desktop computer without damage to the modular keyboard. Both the portable computer and the keyboard base for the desktop computer have a cavity therein for receiving the modular keyboard. The keyboard base has a numerical keypad and arrow keys adjacent the cavity. The modular keyboard is small enough so that the portable computer can be closed and carried in the conventional manner without interference from the modular keyboard. A removal mechanism is provided on each the portable computer and the keyboard base to facilitate removal of the modular keyboard.
    Type: Grant
    Filed: January 6, 1998
    Date of Patent: August 15, 2000
    Assignee: Gateway 2000, Inc.
    Inventors: Glen J. Anderson, Karla A. Radle
  • Patent number: 6104068
    Abstract: An improved structure and method are provided for signal processing. The structure includes dual-gated metal-oxide semiconducting field effect transistor (MOSFET). The dual-gated MOSFET can be fabricated according to current CMOS processing techniques. The body region of the dual-gated MOSFET is a fully depleted structure. The structure includes two gates which are positioned on opposite sides of the opposing sides of the body region. Further, the structure operates as one device where the threshold voltage of one gate depends on the bias of the other gate. Thus, the structure yields a small signal component in analog circuit applications which depends on the product of the signals applied to the gates, and not simply one which depends on the sum of the two signals.
    Type: Grant
    Filed: September 1, 1998
    Date of Patent: August 15, 2000
    Assignee: Micron Technology, Inc.
    Inventor: Leonard Forbes
  • Patent number: 5918018
    Abstract: A system and method of achieving network separation within a computing system having a plurality of network interfaces. A plurality of burbs or regions is defined, wherein the plurality of burbs includes a first and a second burb and wherein each burb includes a protocol stack. Each of the plurality of network interfaces is assigned to one of the plurality of burbs and more than one network interface can be assigned to a particular burb. Processes are bound to specific burbs when they try to access that burb's protocol stack and communication between processes assigned to different burbs is restricted so that a communication between a process bound to one burb must pass through a proxy before being sent to a different burb.
    Type: Grant
    Filed: February 9, 1996
    Date of Patent: June 29, 1999
    Assignee: Secure Computing Corporation
    Inventors: Mark P. Gooderum, Trinh Q. Vu, Glenn Andreas