Abstract: A switched capacitor sense amplifier includes capacitively coupled input, feedback, and reset paths to provide immunity to the mismatches in transistor characteristics and offsets. The sense amplifier includes a cross-coupled pair of inverters with capacitors absorbing offset voltages developed as effects of the mismatches. When used in a dynamic random access memory (DRAM) device, this immunity to the mismatches and offsets allows the sense amplifier to reliably detect and refresh small signals.

Abstract: The present invention provides aminoglycosides and pharmaceutical compositions that include the aminoglycosides. The aminogylcosides are useful to treat or prevent infectious diseases (e.g., bacterial infections) in a mammal (e.g., human).

Abstract: An interface operates at an operating frequency. The interface includes transmitters and receivers that operate within the operating frequency of the interface. The interface also includes circuit elements to allow transmission of signals across the interface in which the signals have a frequency lower than the operating frequency of the interface.

Abstract: A transparent amorphous carbon layer is formed. The transparent amorphous carbon layer has a low absorption coefficient such that the amorphous carbon is transparent in visible light. The transparent amorphous carbon layer may be used in semiconductor devices for different purposes. The transparent amorphous carbon layer may be included in a final structure in semiconductor devices. The transparent amorphous carbon layer may also be used as a mask in an etching process during fabrication of semiconductor devices.

Abstract: One aspect of the present invention relates to a method for forming a strained semiconductor structure. In various embodiments, at least two strong bonding regions are defined for a desired bond between a crystalline semiconductor membrane and a crystalline semiconductor substrate. The two strong bonding regions are separated by a weak bonding region. The membrane is bonded to the substrate at a predetermined misorientation. The membrane is pinned to the substrate in the strong bonding regions. The predetermined misorientation provides the membrane in the weak bonding region with a desired strain. In various embodiments, the membrane is bonded to the substrate at a predetermined twist angle to biaxially strain the membrane in the weak bonding region. In various embodiments, the membrane is bonded to the substrate at a predetermined tilt angle to uniaxially strain the membrane in the weak bonding region. Other aspects are provided herein.

Abstract: An implantable cardiac lead, and/or subassembly includes an elongate sheath of insulative material including an insulative first layer and a protective second layer. The insulative first layer has at least one adhesive enhancing activated surface.

Abstract: Electronic devices are constructed by a method that includes forming a first conductive layer in an opening in a multilayer dielectric structure supported by a substrate, forming a core conductive layer on the first conductive layer, subjecting the core conductive layer to a H2 plasma treatment, and depositing a capping adhesion/barrier layer on the core conductive layer after the H2 plasma treatment. The multilayer dielectric structure provides an insulating layer for around the core conducting layer and at least one sacrificial layer for processing. The H2 plasma treatment removes unwanted oxide from the surface region of the core conducting layer such that the interface between the core conducting layer and the capping adhesion/barrier is substantially free of oxides. In an embodiment, the core conducting layer is copper with a titanium nitride or zirconium capping adhesion/barrier layer.

Abstract: An automation server interfaces with broadcast scheduling systems of various types to automatically synchronize the behavior of interactive applications relative to various broadcast programs, such as television shows and commercials, so as to maintain the appropriate interactive application for whatever broadcast program is airing. This allows for television shows which have an associated interactive application, but which are segmented by commercials (which may have their own interactive applications) to have their interactive application displayed while the television show in on, but not during commercials, while maintaining any state information that has been created during execution of the interactive application. The automation server includes multiple channel interfaces, each having a translator and an event manager. The translator translates native control signals from the scheduling system into a fixed set of atomic commands which represent the lifecycle behavior of a broadcast program.

Abstract: A electrical interface for an electronic package, using lands on the package which are non-planar with metal layers within the package. This non-planar or tilted land grid array (TLGA) package is assembled with a complementary TLGA socket to make electronic connection to the package.

Abstract: A simultaneous bidirectional port coupled to a bus includes a synchronization circuit that synchronizes the port with another simultaneous data port coupled to the same bus. The synchronization circuit includes an output driver having an imbalanced output impedance, and includes a receiver with input hysteresis. The input hysteresis of the receiver is not satisfied unless both drivers with imbalanced output impedance coupled to the bus assert an output signal. Each driver asserts a signal on the bus when initialization of the corresponding simultaneous bidirectional port is complete. When both simultaneous bidirectional ports are initialized, the hysteresis of the receivers is satisfied, and each port is notified that both have been initialized.

Abstract: A system and method to facilitate a transaction in a network-based commerce facility is provided. The method includes presenting a plurality of listings to a user, and monitoring selection of one of the plurality of listings by the user. Thereafter, the user is provided with an indication of an equivalent periodic payment of a plurality of periodic payments associated with an offer to purchase. In one embodiment, the user is provided with an option to conclude the transaction for the selected listing based on a plurality of periodic payments. In certain embodiments, the network-based commerce facility is a web-based auction facility where the offers are in the form of bids. Accordingly, in this embodiment, the periodic payment may be a monthly payment and the products are movable goods such as motor vehicle, motorcycles, watercraft, or the like.

Abstract: Structures, systems and methods for transistors utilizing oxide nanolaminates are provided. One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region by a gate insulator. The gate insulator includes oxide insulator nanolaminate layers with charge trapping in potential wells formed by different electron affinities of the insulator nanolaminate layers.

Abstract: An Internet protocol (IP) packet switching communication system using real time transport protocol (RTP). Control packets map group identification codes to a multicast address on a network. Control packets are distributed on the network using simple object access protocol (SOAP) messages with extensible markup language (XML) payloads. Mapping may include dynamic or static functions. Multicast address data is distributed among routers. A message from a caller is multicast by the routers, based on the multicast address, to one or more destinations.

Abstract: In one aspect, a method of interconnecting two or more foils of a capacitor, the method comprising connecting together one or more anode connection members of one or more anode foils and one or more cathode connection members of one or more cathode foils and electrically isolating the one or more anode foils from the one or more cathode foils.

Abstract: Structures, systems and methods for floating gate transistors utilizing oxide-conductor nanolaminates are provided. One floating gate transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A floating gate is separated from the channel region by a first gate oxide. The floating gate includes oxide-conductor nanolaminate layers to trap charge in potential wells formed by different electron affinities of the oxide-conductor nanolaminate layers.

Abstract: A non-human animal model for endometriosis is provided as well as methods of making and using the animal.

Abstract: The present invention provides methods of using small cyclic peptides that can inhibit or prevent skin irritation caused by proteolytic activity.

Abstract: A method for forming a split thin film capacitor for providing multiple power and reference supply voltage levels to electrical devices such as integrated circuits, may be useful in space restricted applications, and in applications that require very close electrical connections between the power consumer and the power supply. An example of both a space restricted application and a close coupling application may be an integrated circuit such as a microprocessor, that may need a closely coupled capacitor supplying and moderating power to the microprocessor in order to quickly respond to instantaneous power demands that may be found in high clock rate devices. The method may supply a lower voltage power supply level for minimum sized transistors in the fast core logic portions of the microprocessor, and a higher voltage power supply level for the cache memory and I/O transistors.

Abstract: A delay line circuit and method to delay digital data in a main memory is provided. The delay line circuit may comprise primary delay line cache, secondary delay line cache, and a cache controller to control communication of data between the secondary delay cache and the primary delay cache. The primary delay line cache may receive digital data to be delayed from a signal processor module, and secondary delay line cache may be connected to the primary delay line cache and the main memory to send data to and receive delayed data from the main memory. Data in the secondary delay line cache may be updated with data from the main memory or with data from the primary delay line cache. The invention extends to a machine-readable medium comprising a set of instructions for executing any of the methods described herein.