Abstract: Accessing some storage-area networks (SANs) requires a client computer to include a special electronic component, known as a host bus adapter (HBA). However, the present inventor recognized that conventional host bus adapters add considerable expense to the cost of accessing the storage-area network. Accordingly, the present inventor devised a host bus adapter that is implemented in software and thus referred to as a “virtual” host bus adapter. One exemplary embodiment of the virtual host bus adapter includes a hardware-emulation module that makes the virtual host bus adapter appear to operating system environments as a conventional host bust adapter with dedicated hardware.

Abstract: In some embodiments, apparatus and systems, as well as methods, may include providing an analog temperature output responsive to a combination signal comprising a combination of an analog compensation output and a reference signal, and converting the analog temperature output to a digital temperature output responsive to an analog reference signal output, perhaps according to a polynomial function. Providing a digital compensation output corresponding to the digital temperature output, and converting the digital compensation output to the analog compensation output responsive to the analog reference signal output may also be included.

Abstract: A highly polished femoral implant (1) has a proximal neck portion (10), a distal tip portion (30), and an elongate stem portion (20) that extends from the neck portion to the tip portion. The stem portion (20) has a proximal or metaphyseal end region (21) which adjoins the neck portion (10), the proximal/metaphyseal end region (21) having a profile in the medio-lateral plane defined by a curved or angled medial outer contour and a curved or straight lateral outer contour. The stem portion (20) of the implant has a first part (24) adjacent said send region (21) having a profile in the medio-lateral plane which tapers distally at a first angle of taper to a region intermediate the length of the stem portion, and a second part (25,26) distal of the first part (24) having a profile in the medio-lateral plan which tapers distally at a second angle of taper from the region intermediate the length of the stem portion.

Abstract: A capacitor with Enhanced capacitance per cell area is provided. A container supported by a substrate is formed, followed by a first layer of undoped substantially amorphous silicon. Next, a layer of heavily doped amorphous silicon is formed on the first layer. A second layer of undoped amorphous silicon is formed on the doped layer. The layers are formed in a non-oxidizing ambient so that no oxide is formed between the layers. The structure formed is planarized to form separate containers made from the doped and undoped amorphous silicon layers. Any remaining oxide is then removed from the exterior sidewalls. Selected ones of the first and second undoped layers are seeded and annealed to convert the first and second layers to HSG. A dielectric layer and second electrode are formed to complete the cell capacitor.