Abstract: Disclosed are a method of and system for digital frequency clocking in a processor core. At least one-processor core is provided, and that processor core has a clocking subsystem for generating an output clock signal, which may be an analog signal at a variable frequency. Digital frequency control data are transmitted or distributed to the processor core; and that one processor core receives the digital frequency control data transmitted to the core, and uses that received digital frequency control data to set the frequency of the output clock signal of the clocking subsystem of the processor core. Preferably, multiple cores are asynchronously clocked and the core frequencies are independently set, and, there is no phase relationship between the core clocks.
Type:
Grant
Filed:
April 12, 2007
Date of Patent:
March 29, 2011
Assignee:
International Business Machines Corporation
Inventors:
Lawrence Jacobowitz, Mark B. Ritter, Daniel J. Stigliani, Jr.
Abstract: The invention addresses the problem of creating a high-speed, high-efficiency photodetector that is compatible with Si CMOS technology. The structure consists of a Ge absorbing layer on a thin SOI substrate, and utilizes isolation regions, alternating n- and p-type contacts, and low-resistance surface electrodes. The device achieves high bandwidth by utilizing a buried insulating layer to isolate carriers generated in the underlying substrate, high quantum efficiency over a broad spectrum by utilizing a Ge absorbing layer, low voltage operation by utilizing thin a absorbing layer and narrow electrode spacings, and compatibility with CMOS devices by virtue of its planar structure and use of a group IV absorbing material. The method for fabricating the photodetector uses direct growth of Ge on thin SOI or an epitaxial oxide, and subsequent thermal annealing to achieve a high-quality absorbing layer.
Type:
Grant
Filed:
November 6, 2006
Date of Patent:
March 29, 2011
Assignee:
International Business Machines Corporation
Inventors:
Jack O. Chu, Gabriel K. Dehlinger, Alfred Grill, Steven J. Koester, Qiqing Ouyang, Jeremy D. Schaub
Abstract: A plurality of optical fibers are bundled, and the fiber bundle is cut at a part of a mouthpiece which is fixed on an intermediate part of the fiber bundle. Thus, the fiber bundle is divided into a first optical fiber bundle and a second optical fiber bundle. Division surfaces of the first and second optical fiber bundles have the same properties and condition since the first and second optical fiber bundles are formed of the fiber bundle that is obtained by bundling the same optical fibers. The first optical fiber bundle is assembled in an insertion section of an endoscope and the second optical fiber bundle is assembled in a flexible tube, and a first light guide in the insertion section of the endoscope and a second light guide in the flexible tube are formed. Thereby, a separable light transmission path of the light guide is formed.
Abstract: A System-on-Chip (SoC) component comprising a single independent multiprocessor subsystem core including a plurality of multiple processors, each multiple processor having a local memory associated therewith forming a processor cluster; and a switch fabric means connecting each processor cluster within an SoC integrated circuit (IC). The single SoC independent multiprocessor subsystem core is capable of performing multi-threading operation processing for SoC devices when configured as a DSP, coprocessor, Hybrid ASIC, or network processing arrangements. The switch fabric means additionally interconnects a SoC local system bus device with SoC processor components with the independent multiprocessor subsystem core.
Type:
Grant
Filed:
June 1, 2007
Date of Patent:
March 29, 2011
Assignee:
International Business Machines Corporation
Inventors:
Christos J. Georgiou, Victor L. Gregurick, Valentina Salapura
Abstract: Disclosed is a method of executing an electrical function, such as a fusing operation, by activation through a chip embedded photodiode through spectrally selected external light activation, and corresponding structure and circuit. The present invention is based on having incident light with specific intensity/wave length characteristics, in conjunction with additional circuit elements to an integrated circuit, perform the implementation of repairs, i.e., replacing failing circuit elements with redundant ones for yield and/or reliability. Also to perform disconnection of ESD protection device from input pad one the packaged chip is placed in system. No additional pins on the package are necessary.
Type:
Grant
Filed:
December 23, 2009
Date of Patent:
March 29, 2011
Assignee:
International Business Machines Corporation
Inventors:
Wagdi W. Abadeer, James W. Adkisson, Jeffrey S. Brown, Kiran V. Chatty, Robert J. Gauthier, Jr., Michael J. Hauser, Jed H. Rankin, William R. Tonti
Abstract: The present invention has found that a series of peptides having sequences that substantially correspond to specific regions of the C-terminus of IL-16 can inhibit the activity of IL-16. The present invention has demonstrated that such IL-16-inhibiting peptides can be as short as 4 amino acids in length. Based on these discoveries, the present invention provides IL-16 antagonist peptides and the use thereof for the treatment of IL-16 mediated disorders such as certain inflammatory diseases.
Type:
Grant
Filed:
March 16, 2007
Date of Patent:
March 29, 2011
Assignee:
Trustees of Boston University
Inventors:
David M. Center, William W. Cruikshank, Hardy Kornfeld
Abstract: The invention provides a high temperature (about 1150° C. or greater) annealing process for converting thick polycrystalline Si layers on the order of 1 ?m to 40 ?m on a single crystal seed layer into thick single crystal Si layers having the orientation of the seed layer, thus allowing production of thick Si films having the quality of single crystal silicon at high rates and low cost of processing. Methods of integrating such high temperature processing into solar cell fabrication are described, with particular attention to process flows in which the seed layer is disposed on a porous silicon release layer. Another aspect pertains to the use of similar high temperature anneals for poly-Si grain growth and grain boundary passivation. A further aspect relates to structures in which these thick single crystal Si films and passivated poly-Si films are incorporated.
Type:
Grant
Filed:
November 3, 2008
Date of Patent:
March 29, 2011
Assignee:
International Business Machines Corporation
Inventors:
Joel P. de Souza, Keith E. Fogel, Daniel A. Inns, Devendra K. Sadana, Katherine L. Saenger
Abstract: The present invention provides a method of integrated semiconductor devices such that different types of devices are formed upon a specific crystallographic orientation of a hybrid substrate. In accordance with the present invention, junction capacitance of one of the devices is improved in the present invention by forming the source/drain diffusion regions of the device in an epitiaxial semiconductor material such that they are situated on a buried insulating layer that extends partially underneath the body of the second semiconductor device. The second semiconductor device, together with the first semiconductor device, is both located atop the buried insulating layer. Unlike the first semiconductor device in which the body thereof is floating, the second semiconductor device is not floating. Rather, it is in contact with an underlying first semiconducting layer.
Type:
Grant
Filed:
October 7, 2008
Date of Patent:
March 29, 2011
Assignee:
International Business Machines Corporation
Abstract: An endoscope is provided that can reduce examination costs by realizing commonality of an operating unit by making an inserting unit and the operating unit attachable/detachable with respect to each other to enable the exchange of inserting units. The endoscope of this invention includes an operating unit, an inserting unit that can be detachably connected to the operating unit, and transmission and reception coils provided in the operating unit and the inserting unit, respectively, for sending and receiving signals in a non-contact manner between the operating unit and the inserting unit when the inserting unit is connected to the operating unit.
Abstract: A semiconductor die including a semiconductor chip and a test structure, located in a scribe area, is designed and manufactured. The test structure includes an array of complementary metal oxide semiconductor (CMOS) image sensors that are of the same type as CMOS image sensors employed in another array in the semiconductor chip and having a larger array size. Such a test structure is provided in a design phase by providing a design structure in which the orientations of the CMOS image sensors match between the two arrays. The test structure provides effective and accurate monitoring of manufacturing processes through in-line testing before a final test on the semiconductor chip.
Type:
Grant
Filed:
March 20, 2008
Date of Patent:
March 29, 2011
Assignee:
International Business Machines Corporation
Inventors:
John J. Ellis-Monaghan, Mark D. Jaffe, Sambasivan Narayan, Anthony J. Perri, Richard J. Rassel, Tian Xia
Abstract: The invention relates to compounds having the formula (I): Wherein R1, R2, R3 and R4 are as described herein. Also disclosed are the method of preparation and their use in therapy.
Type:
Grant
Filed:
May 19, 2009
Date of Patent:
March 29, 2011
Assignee:
Sanofi-Aventis
Inventors:
Christian Congy, Victor Dos Santos, Murielle Rinaldi-Carmona, Arnaud Rouquette, Didier Van Broeck
Abstract: A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy.
Type:
Grant
Filed:
August 10, 2009
Date of Patent:
March 29, 2011
Assignee:
International Business Machines Corporation
Inventors:
Guy A. Cohen, Steven A. Cordes, Sherif A. Goma, Joanna Rosner, Jeannine M. Trewhella
Abstract: A planar pass gate NFET is designed with the same width as a planar pull-down NFET. To optimize a beta ratio between the planar pull-down NFET and an adjoined planar pass gate NFET, the threshold voltage of the planar pass gate NFET is increased by providing a different high-k metal gate stack to the planar pass gate NFET than to the planar pull-down NFET. Particularly, a threshold voltage adjustment dielectric layer, which is formed over a high-k dielectric layer, is preserved in the planar pass gate NFET and removed in the planar pull-down NFET. The combined NFET active area for the planar pass gate NFET and the planar pull-down NFET is substantially rectangular, which enables a high fidelity printing of the image of the combined NFET active area by lithographic means.
Type:
Grant
Filed:
October 25, 2007
Date of Patent:
March 22, 2011
Assignee:
International Business Machines Corporation
Inventors:
Xiangdong Chen, Shang-Bin Ko, Dae-Gyu Park
Abstract: The embodiments of the present invention disclose an event detection method and device. The method includes: predefining event-based detection rules with a predicative context-free grammar; generating by parsing the detection rules a parsing table of pushdown automaton which supports parallel parsing; receiving an event to be detected; and analyzing by a controller the event to be detected according to the parsing table, to obtain a detection result. The present invention is especially applicable to detection of network attack events. The embodiments of the present invention detect the attacks with a predicative context-free grammar on the basis of events, and ensure a close combination of a protocol parsing process and an attack detection process, as well as a close combination of multiple attack detection rules, thus decreasing unnecessary calculations.
Abstract: An impact drive actuator comprises a fixing member, a vibrator, a vibrating member, a movable body, a drive circuit, and a friction adjustment section. The friction adjustment section includes a first electrode disposed on a surface of the movable body that faces the vibrating member and a second electrode disposed on a surface of the vibrating member that faces the movable body and electrically isolated from the first electrode. An electrostatic force is caused to act between the first and second electrodes to change an electrostatic force between the vibrating member and movable body so as to change the frictional force acting between the movable body and vibrating member.
Abstract: The present invention relates to compounds of the formula I, in which R1; R2; R3; R4; R5; R6; R7; R8; R9; R10; R11; R12; R13; A; B, D and E have the meanings indicated in the claims. The compounds of the formula I are valuable pharmacologically active compounds. They exhibit a strong anti-aggregating effect on platelets and thus an anti-thrombotic effect and are suitable e.g. for the therapy and prophylaxis of cardio-vascular disorders like thromboembolic diseases or restenoses. They are reversible antagonists of the platelet ADP receptor P2Y12, and can in general be applied in conditions in which an undesired activation of the platelet ADP receptor P2Y12 is present or for the cure or prevention of which an inhibition of the platelet ADP receptor P2Y12 is intended. The invention furthermore relates to processes for the preparation of compounds of the formula I, their use, in particular as active ingredients in pharmaceuticals, and pharmaceutical preparations comprising them.
Abstract: Low-viscosity, finely divided oil-in-water emulsions with long-term stability, comprising an emulsifier combination of noncarbohydrate polyol partial esters of linear or branched, saturated or unsaturated fatty acids having 6 to 22 carbon atoms (emulsifier component A) and emulsifiers based on carbohydrate (emulsifier component B), one or more oils, and preservative are provided. Additionally, the present invention provides for the preparation of the emulsions from concentrates, the corresponding concentrates, and the use of the emulsions according to the invention for producing cosmetic, dermatological or pharmaceutical preparations, in particular for producing impregnation emulsions for wet wipes.
Type:
Grant
Filed:
March 7, 2006
Date of Patent:
March 22, 2011
Assignee:
Evonik Goldschmidt GmbH
Inventors:
Petra Allef, Peter Hameyer, Jürgen Meyer, Gabriele Polak
Abstract: A process of monitoring the dispensing of process fluids in precision processing operations. A precision measuring instrument measures a cumulative amount of a process fluid dispensed to at least one dispensing station and compares that amount with a predetermined amount. An alarm is provided to an operator when the cumulative actual required amount of process fluid dispensed after a preset number of dispensations differs from the cumulative predetermined dispensed amount of that fluid by more than a preset percentage.
Type:
Grant
Filed:
November 30, 2007
Date of Patent:
March 22, 2011
Assignee:
International Business Machines Corporation
Abstract: A geometrically shaped solid carrier is provided that improves the performance and effectiveness of an olefin epoxidation catalyst for epoxidizing an olefin to an olefin oxide. In particular, improved performance and effectiveness of an olefin epoxidation catalyst is achieved by utilizing a geometrically shaped refractory solid carrier in which at least one wall thickness of said carrier is less than 2.5 mm.
Type:
Grant
Filed:
March 10, 2008
Date of Patent:
March 22, 2011
Assignee:
SD Lizenzverwertungsgesellschaft mbH & Co. KG
Inventors:
Serguei Pak, Andrzej Rokicki, Howard Sachs