Abstract: A system for substrate scale integration by interconnecting a large number of separate memory (or other circuit) modules on a semiconductor substrate so as to electrically exclude both defective modules and defective interconnect/power segments, and include operative modules and interconnect/power segments. A set of discretionary connections are associated with each of the separate modules and interconnect/power segments and such connections are made (or broken) after a module or interconnect or power segment is tested. A power supply network is set up by combining operative power segments. A bidirectional bus is set up by combining operative interconnect segments to connect to each operative modules. This bidirectional bus consists of one or more hierarchies for speed, power and yield considerations. Each module is assigned an identity code using discretionary connections.

Abstract: For the purpose of identifying the authenticity of an article, an incident detecting light beam having a certain wave length and a polarization plane extending in a certain direction is projected from a light emitting element, and the plane of polarization of this incident light is rotated by 90.degree. as it impinges upon and reflected by an identification region having a specific reflective directivity owing to its diffractive property, and the reflected linearly polarized light is received by a light receiving element which is capable of recognizing the diffractive property via a polarization filter oriented so as to receive only the light having a plane of polarization perpendicular to that of the incident light.