Abstract: The present invention provides a semiconductor device marking apparatus comprising a package loader, on which a plurality of semiconductor device packages are loaded, a package provider, which provides the semiconductor device packages one by one from the package loader, a transfer rail, which transfers the semiconductor device packages provided by the package provider, a marker, which marks an alphanumeric code on the front surfaces of the semiconductor device packages transferred by the transfer rail, a rotating stopper comprising a stop plate and a package control shaft, and a package unloader, on which the semiconductor device packages passing through the rotating stopper are loaded. Further, the present invention provides a rotating stopper for temporarily stopping semiconductor device packages to be transferred along a transfer rail, the rotating stopper comprising a stop plate and a package control shaft.

Abstract: An encryption system and method utilizes a bit stream, called a "master signature", which is divided into bytes with each byte being assigned a byte address. A portion of the master signature, called an "access signature" is randomly selected to encode the message to be transmitted. Both a sender and a receiver have the same access signature. The particular portion of the access signature to be used to encrypt and decrypt a message is identified at the sender by identifying the address of the first byte in this portion of the access signature and the number of bytes sequentially related to this first byte which together with the first byte will be used to encode the message to be transmitted. This information is sent to the receiver. Thus, using this information, the sender can encrypt and the receiver can decrypt the message using the same portion of the access signature.

Abstract: A video multiplexer is disclosed which incorporates a dynamic rate control feature. MPEG encoded video signals for each channel are stored in a first-in first-out (FIFO) buffer. A packetizer for each channel detects the level in the FIFO buffer and issues a request signal to the video multiplexer that the channel desires to transmit the video signals on the network. The bandwidth allocation for a channel is either preselected by the video provider or automatically selected, and tokens are issued by a counter associated with each channel to give greater network access to those channels which require a higher bandwidth. A token multiplier detects the bandwidth needs of the various channels by detecting the rate that the FIFO buffer is being filled and automatically multiplies the number of consecutive packets which the packetizer may transmit over the multiplexer during a single grant.

Abstract: An N-channel power MOSFET includes a storage capacitor and a pair of diodes connected between the gate and drain terminals, respectively, and the capacitor. Since at any given time the voltage at either the drain or the gate of the MOSFET is high, a charge is maintained on the storage capacitor as the MOSFET is switched on and off. The charge stored on the capacitor yields an output voltage which may be used to power a gate drive circuit or other components within or outside the MOSFET.

Abstract: A noise suppressor is provided which includes a signal to noise ration (SNR) determiner, a channel gain determiner, a gain smoother and a multiplier. The SNR determiner determines the SNR per channel of the input signal. The channel gain determiner determines a channel gain .gamma..sub.ch (i) per the ith channel. The gain smoother produces a smoothed gain .gamma..sub.ch (i,m) per the ith channel and the multiplier multiplies each channel of the input signal by its associated smoothed gain .gamma..sub.ch (i,m).

Abstract: A method for forming a trench isolator in a semiconductor substrate comprises: forming a mask layer on the substrate having a opening defining a trench formation region on the substrate; etching the semiconductor substrate through the opening in the mask to form a trench in the substrate; depositing a trench isolation material on the substrate to fill the trench with the isolation material and form a trench isolator in the substrate; planarization-etching the trench isolation material until a top surface of the mask layer is exposed; and, forming a thin protective layer on the surface of the semiconductor substrate. The thin protective layer prevents an edge dipping effect of the trench isolator during subsequent cleaning processes, and enables the planarization-etching to reduce the thickness of the mask layer to the minimum thickness possible, thereby reducing the stresses applied to the semiconductor substrate by the mask layer during subsequent high temperature annealing processes.

Abstract: A vapor generation system includes a supply of liquid; an inert gas stream; an aspirator for aspirating the liquid into the gas stream; a heater for heating the gas stream upstream from the aspirator to a temperature such that aspirated liquid is vaporized in the aspirator to form an inert gas and liquid vaporous mixture; and a mixture outlet for flowing the vaporous mixture against a surface of a workpiece. In a particular application a nitrogen gas stream is heated in a heat exchanger and flows through an aspirator/evaporator to vaporize pumped pulses of hydrofluoric acid in the heated flow stream. The resultant vaporous mixture forms a suitable vaporous etchant for removing silicon dioxide contaminates from a conveyor belt which is employed to convey semiconductor wafers through a chemical vapor deposition processing chamber.

Abstract: A method and apparatus are provided to buffer commands sent from a computer to a peripheral device such as an optical disk data reproduction system, e.g., a CD-ROM drive, so that, even when execution of a command by a microcontroller of the peripheral device is not completed, additional commands from the computer can be queued.

Abstract: A lead forming apparatus and a method for removing tin dust from the surface of the outer leads of semiconductor package are disclosed. The apparatus, in which a brushing operation removes tin dust from the outer leads, includes a supplier part; a lead forming part; a collection part; an intermediate post; a package transportation part; a brush block; and a brush transportation part. The method includes steps of providing a leadframe, forming the package leads, removing tin dust from the leads, and collecting the packages in a container.

Abstract: The invention is an adjustable force deflection device which can be used to guide, deflect, and apply force used in the restoration of deformed vehicle bodies on work benches or straighteners. The device consists of at least two fixable, pivoted joints, each comprising a pair of coupling discs that can be independently rotated about a common central axis to a desired angle relative to each other and then fixed in place. One of the coupling discs in each of the at least two pivotable joints is connected to either a separate force application device or to a tool attached to the portion of the vehicle body to be restored. The second of the coupling discs in each pair is connected to at least one rigid, elongated element of various possible sizes and shapes, or to a plurality of such rigid, elongated elements and interconnecting pivotable joints connected in alternating series.

Abstract: A process for packaging a die uses compressible microspheres to form a stress buffer layer between the die and an epoxy encapsulant to absorb stresses on the die caused by the different thermal expansion rates of the epoxy and die during temperature changes. By using a compressible layer of microspheres or other material, the need for a nitride passivation or other insulating layer to protect the die from thermally-induced stress is eliminated. In addition, the number and size of the microspheres and the amount of epoxy used to seal the package can be adjusted so that the epoxy is approximately co-planar with the top of the package to allow the package to be handled and used with standard equipment and processes.

Abstract: A multi-chip stack package does not include a die pad. The elimination of the die pad provides more room for elements in the package which. Thus, a balanced inner package structure can be achieved, and a poor molding which may expose one of the package elements can be avoided. In the package, an upper chip is bonded to the top surface of a lower chip. To stabilize the chips, auxiliary or inner leads of a lead frame attach to the top surface of a lower chip. This shortens wire lengths between the chips and the inner leads. The shorter wires reduce wire loop heights and thus reduce the probability of exposing wires in a subsequent transfer-molding. A multi-chip stack package which includes an auxiliary lead(s) is also disclosed. The auxiliary leads attach to the top surface of the lower chip and can provide a stable support of a semiconductor chip and prevent the chip from tilting and shifting in transfer-molding. An auxiliary lead can be between the lower and upper chips.

Abstract: The invention relates to a roll press, in particular for processing very abrasive materials, comprising at least two press rolls of which each includes a wear layer arranged on a basic body. The wear layer comprises substantially plane zones of a highly wear-resistant material while the spaces between the highly wear-resistant zones are filled with a material of different wear resistance. Furthermore, the material for the spaces is a composite material which is adapted to be sintered, and the highly wear-resistant zones are formed from hard bodies produced by hot-isostatic pressing. The material for the spaces and the material for the wear-resistant zones are bonded to the basic body in a hot-isostatic pressing process. The wear resistance of the composite material is substantially slightly greater or smaller than the wear resistance of the hard bodies in accordance with a desired profile which will obtained through wear.

Abstract: An improved line driver is disclosed. In one embodiment, the line driver has three inverters and a pass gate. The first inverter has a first input terminal connected directly to the input line of the line driver. The first inverter also has an output terminal coupled to a first output line of the line driver. The second inverter has an output node coupled to a second output line of the line driver. The third inverter has a first input terminal connected directly to the input line of the line driver and an output terminal coupled to the input node of the second inverter. The pass gate has a second input terminal coupled to the input line of the line driver and an output terminal coupled to both the second input terminal of the first inverter and the second input terminal of the third inverter. The pass gate receives an enable signal at a first input terminal and provides a conduction path between the input line of the line driver and the output terminal of the pass gate in response to the enable signal.

Abstract: A semiconductor integrated circuit with a transistor formed within an active area defined by side-walls of a shallow trench isolation region, and method of fabrication thereof, is described. A gate electrode is formed over a portion of the active area and LDD regions formed that are self-aligned to both the gate electrode and the trench side-walls. A dielectric spacer is formed adjacent the gate electrode and extending to the trench side-walls. In this manner, the spacers essentially cover the LDD regions. Source and drain regions are formed that are adjacent the trench side-walls wherein the spacer serves to protect at least a portion of the LDD regions to maintain a spacing of the S/D regions from the gate electrode edge. In this manner an advantageously lowered E.sub.M provided by LDD regions is maintained. In some embodiments of the present invention, S/D regions are formed by implantation through the trench side-walls.

Abstract: An altar includes a cabinet body and a platform, which is located in front of the cabinet body and which has a flat top surface. The cabinet body has an interior chamber and several columns of compartments, each of which is open to the interior chamber and each of which is provided with an openable door. Several box sets are disposed within the interior chamber, and are located respectively behind the columns. Each of the box sets includes an endless flexible member which can be circulated by a driving unit, and a plurality of boxes which are attached to the flexible member. Each of the flexible members can be controlled by a switch member to circulate or stop. Accordingly, each of the boxes can be moved to be aligned with a selected corresponding column of the compartments.

Abstract: Some logic circuits preferentially reside in a particular state. Advantages are gained by a circuit that forces the circuit to the preferential state but allows the preferred state to be overridden. A node in the logic circuit is driven to a particular state, in one embodiment, by a pull-up transistor connected to a pull-down transistor that respectively drive the node to a high state and a low state. A keeper circuit is connected to the node and drives the node to the preferred state unless overpowered by the pull-up transistor and the pull-down transistor. The keeper circuit drives the node using a transistor that is weaker than the pull-up transistor and weaker than the pull-down transistor. A startup-circuit is connected to the node and drives the node to the preferred state when the node powers-up in the nonpreferred state. The start-up circuit drives the node using a transistor that is weaker than the keeper circuit transistor.

Abstract: A field programmable gate array has columns of logic modules. A programming conductor used to conduct programming current to program antifuses of the field programmable gate array extends between two adjacent columns of logic modules. First wire segments extend from the programming conductor and toward the logic modules of a first of the two adjacent columns. Second wire segments extend the opposite direction from the programming conductor and toward logic modules of the second of the two adjacent columns. Programming current used to program antifuses disposed along the first wire segments as well as antifuses disposed along the second wire segments can be supplied from the same programming conductor that extends between the two columns of logic modules. The logic modules of the first column are mirrored versions of the logic modules of the second column.

Abstract: A circuit and method for lowering the corner frequency of a differential preamplifier having an AC coupling circuit includes a compensation circuit to adjust the frequency response characteristics created by the AC coupling circuit. An RC network in the compensation circuit is configured to provide a canceling zero at the corner frequency of the AC coupling circuit. The RC network also provides a pole at a desired frequency lower than the corner frequency of the AC coupling circuit, in order to define the overall preamplifier corner frequency. The compensation circuit allows the capacitance in the AC coupling circuit to be significantly reduced, eliminating the need for external components or a very large integrated capacitance.