Patents Represented by Attorney Skjervin, Morrill, MacPherson, Franklin & Friel

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  • Prefetch/prestore mechanism for peripheral controllers with shared internal bus
    Patent number: 5557750
    Abstract: A single chip peripheral bus adapter circuit has a pair of input and output first in, first out (FIFO) buffers, a main buffer, and a pair of supporting registers. The registers increase the performance of the circuit by eliminating or reducing wait states.
    Type: Grant
    Filed: October 20, 1992
    Date of Patent: September 17, 1996
    Assignee: Future Domain Corporation
    Inventors: Richard S. Moore, Allan F. Pease