Patents Represented by Attorney Slater and Matsil, LLP
-
Patent number: 8345628Abstract: A method for implementing MIP registration or deregistration includes obtaining, by a physical entity in which a destination MIP Foreign Agent (FA) resides, an identity of a mobile terminal (MT ID) and address information of an anchor proxy mobile node or an authenticator; sending a message carrying the MT ID to the anchor proxy mobile node or the authenticator; and implementing MIP registration or deregistration for the mobile terminal corresponding to the MT ID using a credential, in which the credential corresponding to the MT ID is acquired from the anchor proxy mobile node or authenticator.Type: GrantFiled: February 18, 2008Date of Patent: January 1, 2013Assignee: Huawei Technologies Co., Ltd.Inventors: Jianjun Wu, Bin Xia, Zhengfei Xiao
-
Patent number: 8346913Abstract: A method for monitoring and upgrading software in device management includes: monitoring use frequency of software of terminal equipment and storing use frequency information of software; and providing the use frequency information of software to a device management server. Further, a method for upgrading software in device management, includes: monitoring use frequency information of software on terminal equipment and providing corresponding use frequency information of the software to a device management server; and by the device management server, determining by using the use frequency information of software to be upgraded, whether the software to be upgraded satisfies conditions for upgrading, and if the software to be upgraded satisfies the conditions for upgrading, delivering operations for upgrading the software to upgrade the software; otherwise, abandoning the upgrading of the software.Type: GrantFiled: April 14, 2008Date of Patent: January 1, 2013Assignee: Huawei Technologies Co., Ltd.Inventors: Hongtao Gao, Xiaoyi Dong, Xiaoqian Chai
-
Patent number: 8342882Abstract: A USB interface device includes a USB connector electrically connected with a circuit board through pins. A shielding frame is attached to a joint between the USB connector and the circuit board and covering the pins. The shielding frame is a frame body having a first opening at a part thereof attached to the circuit board and a second opening at a part thereof attached to the USB connector.Type: GrantFiled: December 28, 2011Date of Patent: January 1, 2013Assignee: Huawei Device Co., Ltd.Inventors: Xialing Zhang, Chunshu Li
-
Patent number: 8339802Abstract: A module having a stacked magnetic device and semiconductor device, and method of forming the same. In one embodiment, the module includes a printed wiring board including a patterned conductor formed on an upper surface thereof. The module also includes a magnetic core mounted on the upper surface of the printed wiring board proximate the patterned conductor and a semiconductor device mounted on an upper surface of the magnetic core.Type: GrantFiled: February 26, 2009Date of Patent: December 25, 2012Assignee: Enpirion, Inc.Inventors: Ashraf W. Lotfi, Douglas Dean Lopata, John David Weld, Mathew A. Wilkowski
-
Patent number: 8325663Abstract: Systems and methods for providing an efficient network entry for a mobile station in RF communications systems with fully configured and partially configured carriers are described. A distinguishing parameter for fully configured carriers is determined. A mobile station receives a carrier and determines whether a fully configured carrier has been received. The mobile station performs synchronization with a base station using the detected fully configured carrier and completes a network entry procedure. In one method embodiment, the distinguishing parameter is a unique preamble characteristic. In another method embodiment, the fully configured carrier frequency is part of messages broadcast by both the fully configured and partially configured carriers. In yet another method embodiment, the carrier raster for fully configured carriers is distinguishable from the carrier raster for partially configured carriers. Latency is reduced for the network entry process for the mobile stations.Type: GrantFiled: September 4, 2009Date of Patent: December 4, 2012Assignee: Nokia Siemens Networks OyInventors: Zexian Li, Xin Qi
-
Patent number: 8325681Abstract: A call transfer method, system, and device are provided. The method includes obtaining information that the mobile switching center (MSC) of a called user equipment (UE) executes a call transfer service, and instructing the MSC of the called UE to send a call request to a third party UE according to the call originating process of the called UE.Type: GrantFiled: April 23, 2010Date of Patent: December 4, 2012Assignee: Huawei Technologies Co., Ltd.Inventors: Shuiping Long, Hui Jin
-
Patent number: 8326154Abstract: A multiwavelength transmitter comprises several laser sources (1) each configured to generate light of a different wavelength and a first array waveguide grating (2) arranged to direct light from each of the laser sources (1) into a first waveguide. The transmitter further comprises several electroabsorption modulators (7) each arranged to modulate light at one of the wavelengths with a respective data signal and a second array waveguide grating (6) arranged to direct each of said different wavelengths of light from the first waveguide to a respective one of the modulators (7). The optical modulators (7) are reflective optical modulators and the second array waveguide grating (6) is arranged to direct the modulated light reflected from each of the optical modulators (7) back into the first waveguide. An optical circulator (5) is provided in the first waveguide to couple modulated light from the second array waveguide grating (6) into an output waveguide.Type: GrantFiled: November 16, 2007Date of Patent: December 4, 2012Assignee: Huawei Technologies Co., Ltd.Inventors: Alistair J. Poustie, Graeme D. Maxwell, Richard Wyatt, David W. Smith, David G. Moodie, Ian F. Lealman
-
Patent number: 8320153Abstract: Embodiments relate to a semiconductor device, including a channel area; a gate line extending along the channel area so that the channel area can be set into a conductive state by activating the gate line; a plurality of terminals including an electrical connection to the channel area, so that the plurality of terminals is connectable to a predetermined voltage by activating the gate line.Type: GrantFiled: June 20, 2008Date of Patent: November 27, 2012Assignee: Infineon Technologies AGInventor: Michael Sommer
-
Patent number: 8307749Abstract: A system for venting a container includes a venting device, a transition manifold coupled with the venting device, and an initiator coupled with the transition manifold. The initiator includes a reactive panel including a substrate and a plurality of reactive layers disposed on the substrate. A method of venting a container includes providing a venting system operatively associated with the container, reacting a first material of the venting system with a second material of the venting system to produce an exothermic reaction, and venting the container as a result of reacting the first material with the second material.Type: GrantFiled: April 9, 2008Date of Patent: November 13, 2012Assignee: Lockheed Martin CorporationInventor: Roger B. Reed
-
Patent number: 8288277Abstract: A method of processing a substrate with a conductive film formed thereover and method of forming a micromagnetic device. In one embodiment, the method of processing the substrate includes reducing a temperature of the substrate to a stress-compensating temperature, and maintaining the temperature of the substrate at the stress-compensating temperature for a period of time. The method also includes increasing the temperature of the substrate above the stress-compensating temperature.Type: GrantFiled: May 16, 2011Date of Patent: October 16, 2012Assignee: Enpirion, Inc.Inventors: Ken Takahashi, Trifon M. Liakopoulos
-
Patent number: 8276497Abstract: A blast attenuator includes an enclosure defining a cavity; a core defining a plurality of interconnected pores, the core disposed in the cavity; and a shear thickening fluid disposed in the cavity, such that the shear thickening fills a portion of a pore volume of the core. A blast attenuation assembly includes a blast attenuator including a shear thickening fluid and a crushable element that omits a shear thickening fluid operably associated with the blast attenuator. A method includes the steps of providing a rigid core defining a plurality of interconnected pores and placing an enclosure about the core, the enclosure defining a filling port. The method further includes the steps of filling at least a portion of a pore volume of the core with a shear thickening fluid and closing the filling port to seal the enclosure and form a first blast attenuator.Type: GrantFiled: March 9, 2006Date of Patent: October 2, 2012Assignee: Lockheed Martin CorporationInventor: David L. Hunn
-
Patent number: 8183627Abstract: Semiconductor-on-insulator structures facilitate the fabrication of devices, including MOSFETs that are at least partially depleted during operation and FinFETs including bilayer fins and/or crystalline oxide.Type: GrantFiled: May 22, 2008Date of Patent: May 22, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventor: Matthew T. Currie
-
Patent number: 8117955Abstract: A weapon interface system, and methods of operating the same. The weapon interface system is coupled to an electrical interconnection system of a delivery platform and a weapon system coupled to a rack system. The weapon interface system includes a translation interface configured to provide an interface between the electrical interconnection system and an inductive power and data circuit. The weapon interface system also includes a weapon coupler, coupled to the translation interface, configured to provide an inductive coupling to the weapon system to provide mission information thereto.Type: GrantFiled: October 26, 2007Date of Patent: February 21, 2012Assignee: Lone Star IP Holdings, LPInventors: Steven D. Roemerman, John P. Volpi, Joseph Edward Tepera
-
Patent number: 8114745Abstract: A transistor suitable for high-voltage applications is provided. The transistor is formed on a substrate having a deep well of a first conductivity type. A first well of the first conductivity type and a second well of a second conductivity type are formed such that they are not immediately adjacent each other. The well of the first conductivity type and the second conductivity type may be formed simultaneously as respective wells for low-voltage devices. In this manner, the high-voltage devices may be formed on the same wafer as low-voltage devices with fewer process steps, thereby reducing costs and process time. A doped isolation well may be formed adjacent the first well on an opposing side from the second well to provide further device isolation.Type: GrantFiled: April 14, 2010Date of Patent: February 14, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Bau Wu, Chien-Shao Tang, Robin Hsieh, Ruey-Hsin Liu, Shun-Liang Hsu
-
Patent number: 8101994Abstract: A semiconductor device having multiple fin heights is provided. Multiple fin heights are provided by using multiple masks to recess a dielectric layer within a trench formed in a substrate. In another embodiment, an implant mold or e-beam lithography are utilized to form a pattern of trenches in a photoresist material. Subsequent etching steps form corresponding trenches in the underlying substrate. In yet another embodiment, multiple masking layers are used to etch trenches of different heights separately. A dielectric region may be formed along the bottom of the trenches to isolate the fins by performing an ion implant and a subsequent anneal.Type: GrantFiled: October 26, 2010Date of Patent: January 24, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chen-Hua Yu, Chen-Nan Yeh, Yu-Rung Hsu
-
Patent number: 8097953Abstract: A system, a structure and a method of manufacturing stacked semiconductor substrates is presented. A first substrate includes a first side and a second side. A through substrate via (TSV) protrudes from the first side of the first substrate. A first protruding portion of the TSV has a conductive protective coating and a second protruding portion of the TSV has an isolation liner. The system further includes a second substrate and a joint interface structure that bonds the second substrate to the first substrate at the conductive protective coating of the first protruding portion of the TSV.Type: GrantFiled: October 28, 2008Date of Patent: January 17, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Ming-Hong Tseng, Kai-Ming Ching, Chen-Shien Chen, Ching-Wen Hsiao, Hon-Lin Huang, Tsung-Ding Wang
-
Patent number: 8097924Abstract: A MOSFET includes a gate having a high-k gate dielectric on a substrate and a gate electrode on the gate dielectric. The gate dielectric protrudes beyond the gate electrode. A deep source and drain having shallow extensions are formed on either side of the gate. The deep source and drain are formed by selective in-situ doped epitaxy or by ion implantation and the extensions are formed by selective, in-situ doped epitaxy. The extensions lie beneath the gate in contact with the gate dielectric. The material of the gate dielectric and the amount of its protrusion beyond the gate electrode are selected so that epitaxial procedures and related procedures do not cause bridging between the gate electrode and the source/drain extensions. Methods of fabricating the MOSFET are described.Type: GrantFiled: June 18, 2004Date of Patent: January 17, 2012Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chih-Hao Wang, Shang-Chih Chen, Yen-Ping Wang, Hsien-Kuang Chiu, Liang-Gi Yao, Chenming Hu
-
Patent number: 7786762Abstract: Circuits and methods for a differential signal interface for coupling differential signals at a first frequency on a pair of opposite polarity signals to a multiple gigabit transceiver with generic buffers for receiving, transmitting or transceiving out of band signals at a second frequency lower than the first frequency are disclosed. Termination networks are provided coupling generic input buffers to respective ones of the pair of opposite polarity signals for receiving out of band signals where the opposite polarity signals are placed at voltages so that the differential voltage between them is below a threshold voltage. Methods for providing generic buffers with multiple gigabit transceivers for receiving and transmitting out of band signals on a differential signal interface are provided. Out of band signals are received when the out of band signaling protocol is not known.Type: GrantFiled: January 21, 2009Date of Patent: August 31, 2010Assignee: Xilinx, Inc.Inventors: Richard S. Ballantyne, Catalin Baetoniu, Mark Paluszkiewicz, Henry E. Styles, Ralph D. Wittig
-
Patent number: 7243596Abstract: In a combined oil ring having a spacer expander to be installed between a pair of upper and lower side rails, a plurality of axially protruding inner peripheral protruding portions are formed on the inner peripheral side of the spacer expander along its peripheral direction. The inner peripheral protruding portions press the inner peripheral surface of the side rails. On the outer peripheral side of the spacer expander, a plurality of slits are formed, and a plurality of connecting portions are located in the peripheral direction isolated by the slits. On the plurality of connecting portions, axially protruding outer peripheral protruding portions are formed.Type: GrantFiled: February 21, 2006Date of Patent: July 17, 2007Assignee: Kabushiki Kaisha RikonInventors: Miyuki Usui, Nobuo Katayama, Masahiro Nakazawa
-
Patent number: 7112507Abstract: A method of forming a metal-insulator-metal (MIM) capacitor wherein a plate of a MIM capacitor is formed in the entire thickness of a metallization layer of a semiconductor device. At least one thin conductive material layer is disposed within the material of the metallization layer to reduce the surface roughness of the metallization layer, thus improving the reliability of the MIM capacitor. The thin conductive material layer may comprise TiN, TaN, or WN and may alternatively comprise a barrier layer disposed over or under the TiN, TaN, or WN. One plate of the MIM capacitor is patterned using the same mask that is used to pattern conductive lines in a metallization layer, thus reducing the number of masks that are required to manufacture the MIM capacitor.Type: GrantFiled: November 24, 2003Date of Patent: September 26, 2006Assignee: Infineon Technologies AGInventors: Sun-Oo Kim, Ernst Demm