Abstract: A semiconductor device wafer in which the interlayer insulating film between wirings and the passivation film formed during the manufacturing process are left on the entire surface of the scribe line area during dicing. The interlayer insulating film between wirings and the passivation film formed during the manufacturing process may be left on most of the scribe line area, in which case a slit groove is provided along the periphery of a chip and the passivation film is removed at the location of the slit groove. Alternatively, the passivation film formed during the manufacturing process may be left on a part of the scribe line area where a film structure is provided.