Patents Represented by Attorney Stallman & Pollack LLP
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Patent number: 7254153Abstract: An optically pumped semiconductor laser includes an active ring-resonator having two or more optically pumped semiconductor (OPS) structures each including a mirror-structure and a multilayer gain-structure. The mirror-structures serve as fold mirrors for the resonator axis. An optically nonlinear crystal may be included in the ring-resonator for generating second-harmonic radiation from fundamental radiation generated in the resonator. Another optically nonlinear crystal may be provided for generating third-harmonic or fourth-harmonic radiation from the second-harmonic radiation. In one example, including a third-harmonic generating crystal, a passive ring-resonator partially coaxial with the active ring-resonator is provided for circulating second-harmonic radiation to provide resonant amplification of the second-harmonic radiation for enhancing third-harmonic conversion.Type: GrantFiled: July 29, 2005Date of Patent: August 7, 2007Assignee: Coherent, Inc.Inventors: Stuart Butterworth, Andrea Caprara, R. Russel Austin
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Patent number: 7227881Abstract: A Master Oscillator (MO)—Power Amplifier (PA) configuration (MOPA) can be used advantageously in an excimer laser system for micro-lithography applications, where semiconductor manufacturers demand powers of 40 W or more in order to support the throughput requirements of advanced lithography scanner systems. A MOPA-based laser system can provide both high pulse energies and high spectral purity. A MOPA system can utilize a multi-pass PA, as well as a special beam path capable of reducing the amount of ASE (Amplified Spontaneous Emission) and feedback to the MO. Lithography scanner optics are primarily fused silica, such that the peak pulse power must be kept low to avoid material compaction when a MOPA system is used with lithography applications. This conflict between the demand for high average power and the low peak power requirement of the pulsed excimer laser source can be resolved by using a novel beam path to generate a sufficiently long pulse length.Type: GrantFiled: March 9, 2006Date of Patent: June 5, 2007Assignee: Lambda Physik AGInventors: Sergei V. Govorkov, Rainer Paetzel
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Patent number: 7221608Abstract: The snapback characteristics of the parasitic NPN structure inside an NMOS device are used to write and store information in the device by periodically triggering the device from the high impedance state to the low impedance state using the self turn-on characteristics of the device under elevated voltage. To minimize power consumption, and thus overheating, in the “on” state, a pulsed mode operation is combined with dV/dt triggering powering the device at a constant Vdd pulse amplitude.Type: GrantFiled: October 4, 2004Date of Patent: May 22, 2007Assignee: National Semiconductor CorporationInventors: Vladislav Vashchenko, Peter J. Hopper, Philipp Lindorfer
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Patent number: 7088451Abstract: A phase-sensitive interferometric broadband reflectometer includes an illumination source for generating an optical beam. A beam splitter or other optical element splits the optical beam into probe beam and reference beam portions. The probe beam is reflected by a subject under test and then rejoined with the reference beam. The combination of the two beams creates an interference pattern that may be modulated by changing the length of the path traveled by the probe or reference beams. The combined beam is received and analyzed by a spectrometer.Type: GrantFiled: October 24, 2005Date of Patent: August 8, 2006Assignee: Tokyo Electron LimitedInventor: Abdurrahman Sezginer
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Patent number: 7006549Abstract: Two parallel sets of groups of beams from diode laser bars are spaced apart by a distance V. The two sets of beam groups are interleaved by a beam combiner to provide on set of beam groups spaced apart by a distance V/2. The beam combiner includes a plurality of reflective strips in a plane inclined to the direction of propagation of the beam groups. One set of beam groups is transmitted through the beam combiner without being intercepted by the reflective strips. The other set of beam groups is interleaved with the transmitted set of beam groups by reflecting the other set of beam groups from the reflective strips.Type: GrantFiled: June 11, 2003Date of Patent: February 28, 2006Assignee: Coherent, Inc.Inventors: Serguei G. Anikitchev, R. Russel Austin
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Patent number: 6907058Abstract: A beam parameter monitoring unit for coupling with a molecular fluorine (F2) or ArF laser resonator that produces an output beam having a wavelength below 200 nm includes a detector and a beam path enclosure. The unit may also include a beam splitter within the enclosure for separating the output beam into first and second components, or first and second beam are attained by other means. The detector measures at least one optical parameter of the second component of the output beam. The beam path enclosure includes one or more ports for purging the beam path enclosure with an inert gas to maintain the enclosure substantially free of sub-200 nm photoabsorbing species.Type: GrantFiled: January 25, 2001Date of Patent: June 14, 2005Assignee: Lambda Physik AGInventors: Klaus Vogler, Frank Voss, Elko Bergmann
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Patent number: 6597043Abstract: The present invention provides a narrow/short high performance MOS device structure that includes a rectangular-shaped semiconductor substrate region having a first conductivity type. A region of dielectric material is formed at the center of the substrate region. Four substrate diffusion regions, each having a second conductivity type opposite the first conductivity type, are formed in the substrate diffusion region in a respective comer of the substrate region. The four diffusion regions are spaced-apart such that a substrate channel region is defined between each adjacent pair of substrate diffusion regions. A common conductive gate electrode is formed to have four fingers, each one of the fingers extending over a corresponding substrate channel region. The fingers of the common conductive gate electrode are spaced-apart from the underlying substrate channel regions by dielectric material formed therebetween.Type: GrantFiled: November 13, 2001Date of Patent: July 22, 2003Assignee: National Semiconductor CorporationInventor: Abdalla Naem
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Patent number: 6399455Abstract: A method of fabricating a small bipolar transistor emitter in an integrated circuit structure is provided. The integrated circuit structure includes a trench isolation structure formed in a semiconductor substrate to define a substrate active device region. A collector region having a first conductivity type is formed in the substrate active device region beneath a surface thereof. A base region having a second conductivity type opposite the first conductivity type is formed in the substrate active device region above the collector region and extending to the surface of the substrate active device region such that the surface of the active device region forms a surface of the base region. A layer of dielectric material is formed to extend at least partially over the surface of the base region to define an edge of the layer of dielectric material that is formed over the surface of the base region.Type: GrantFiled: June 15, 2001Date of Patent: June 4, 2002Assignee: National Semiconductor CorporationInventor: Abdalla Aly Naem
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Patent number: 6313000Abstract: A vertically-isolated bipolar transistor occupying reduced surface area is fabricated by circumscribing an expected active device region within a first narrow trench. The first trench is filled with sacrificial material impermeable to diffusion of conductivity-altering dopant, and then isolation dopant of a conductivity type opposite to that of the substrate is introduced into the trench-circumscribed silicon region. The introduced isolation dopant is then thermally driven into the substrate, with lateral diffusion of isolation dopant physically constrained by the existing first narrow trench. Epitaxial silicon is then formed over the substrate, with polysilicon formed in regions overlying the filled narrow trench. A second, wider trench encompassing the first trench is etched to consume epitaxial silicon, polysilicon, and the sacrificial material. The second trench is then filled with dielectric material.Type: GrantFiled: November 18, 1999Date of Patent: November 6, 2001Assignee: National Semiconductor CorporationInventor: Vassili Kitch
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Patent number: 6285057Abstract: A semiconductor device that provides for substrate current exiting a MOSFET structure, and hence the performance thereof, to be independently and controllably tuned. The semiconductor device includes a semiconductor substrate of a first conductivity type, a conventional MOSFET structure disposed thereon, and at least one vertical-channel trench-substrate field effect device disposed in the semiconductor substrate. The vertical-channel trench-substrate field effect device includes a vertical-channel region beneath the MOSFET structure. During operation, substrate current exiting the MOSFET structure can be independently and controllably tuned by applying a potential bias to the vertical-channel trench-substrate field effect device that “pinches-off” the vertical-channel region.Type: GrantFiled: November 17, 1999Date of Patent: September 4, 2001Assignee: National Semiconductor CorporationInventors: Peter J. Hopper, Christoph Pichler