Abstract: A carrier for testing a singularized semiconductor die prior to packaging the die utilizes a removable die supporting substrate. The die is placed in the carrier and is electrically connected to the substrate, thereby allowing for the packaging or other use of only known good die. A bridge clamp presses against a rigid cover which, in turn, bias the die against a plurality of die contacting members located on the die supporting substrate. The use of the removable die supporting substrate permits a single carrier design to accommodate different die types and further permits handling equipment to mechanically handle the one carrier design. This facilitates the handling of the carrier so that the carrier can be conveniently used during burn-in and test procedures.
Abstract: Optical alignment techniques, such as those used in "flip chip" bonding, are used to establish ohmic contact with the die by means of raised portions on contact members. This permits accurate alignment with a temporary die fixture in order to test the die. The tested die can then be qualified under a known good die program as having an acceptable degree of reliability. This permits the die to be characterized prior to assembly, so that the die may then be transferred in an unpackaged form. The ohmic contact is preferably established by applying a compression force applied to the die against the substrate results in a limited penetration of the contact member into the bondpads. The arrangement may be used for establishing electrical contact and with a burn-in oven and with a discrete die tester.
Abstract: An improved aluminum alloy from which interconnect lines of VLSI integrated-circuit devices may be fabricated. The alloy, which is comprised of aluminum, copper, titanium and silicon, is not only resistant to electromigration and stress cracking, but produces silicon precipitate crystals which are much finer that those produced by aluminum-copper-silicon alloys under the hot-and-cold temperature cycling that is required by contemporary semiconductor fabrication processes. These fine silicon precipitate crystals are much less likely to destroy the electrical continuity of an alloy-to-silicon junctions within an integrated-circuit device, even where dimensions of such junctions have been reduced. Although other alloy proportions are usable, optimal alloy percentages are deemed to be 0.5 to 3 percent copper by weight and 0.