Abstract: A crystal of a compound semiconductor is deposited on a substrate using a metal organic vapor phase epitaxy within a reaction enclosure having a vertical flow of deposition gas supplied through a gas injector within the deposition enclosure. The deposition gas is supplied in a plurality of divided flow paths in which the flow rates are individually controlled. The injector comprises a plurality of gas jet ports which receive respective, plural flow paths and which are disposed in a two-dimensional array having dimensions corresponding to the two-dimensional main surface dimensions of the substrate thereby to supply a uniform flow of deposition gas over the entire two-dimensional main surface of the substrate. The method and apparatus have special application in the deposition of quaternary III--V compound semiconductor.

Abstract: A scalar data processing method and apparatus for compressing scalar data defined on a two-dimensional surface and for reconstructing the two-dimensional scalar data based on the compressed data. Edge lines of the scalar data are detected, a domain is obtained on a horizontal line intersecting with the edge lines and between the edge lines, and a function is determined as an approximation of a Laplacian of the two-dimensional scalar data at each point in the cut domain. The two-dimensional scalar data is compressed by replacing the two-dimensional scalar data at every point with scalar data at the edge lines, scalar data for providing gradients of the two-dimensional scalar data on the edge lines, and the function determined above. The two-dimensional scalar data by interpolating the two-dimensional scalar data based on the scalar data is reconstructed at the edge lines, scalar data for providing gradients of the two-dimensional scalar data on the edge lines, and the above function.

Abstract: A lookahead (guessahead) prefetching technique is used to reduce the average access time, for accessing memory modules when program addresses are modified into effective addresses for addressing the modules. A first memory address register stores the column address and module designation portions of the current effective address, a second memory address register stores the row address portion of the current effective address, and a third memory address register stores the module designation portion of the prior effective address. Since the same module is frequently accessed many times in succession, the average access time is reduced by starting an access based upon the contents of the second and third memory address registers without waiting until the column address and module designation portions of the current effective address are available for storage in the first memory address register.

Abstract: An output voltage-drop detecting apparatus added to a stabilized DC power source device which includes a power control circuit for controlling a DC input voltage to produce a DC output voltage of a specified value, a reference voltage source whose voltage is capable of being varied, and an error amplifier, with the DC output voltage and the reference voltage being compared by the error amplifier and the power control circuit being controlled by the output of the error amplifier to stabilize the output voltage.

Abstract: A method for drying coal in a coal mill and pneumatically conveying it to a kiln for burning, with a portion of the coal-dust-laden air generated thereby being diverted to a clinker cooler adjacent the kiln in order to ignite the suspended particles and supply hot air for burning the coal. The diverted air is later recirculated back to the coal mill to help dry the coal.

Abstract: In a data processing system having a plurality of virtual address spaces, a virtual address is translated into a real address for accessing a main memory and the translation result is stored in a translation lookaside buffer, as in a processing system having a single virtual address space. Thereafter, in the case of the same virtual address as the above, the translation lookaside buffer is retrieved to translate the virtual address into a real address. Generally, even in the case of the same virtual addresses, if their virtual address spaces are different, the virtual addresses are translated into different real addresses. However, a control program, a control table or a common subroutine is provided in a common area in which the coordination of virtual and real addresses is always constant even in the case of different virtual address spaces.