Abstract: A semiconductor carrier for testing semiconductor components, such as bare dice and chip scale packages, and a method for testing components using the carrier, are provided. The carrier includes a base, an interconnect for making temporary electrical connections with the component, and a force applying mechanism for biasing the component against the interconnect. The force applying mechanism includes an elastomeric biasing member adapted to apply a relatively large biasing force during assembly of the carrier and a smaller biasing force in the assembled carrier. The force applying mechanism also includes a pressure plate which can include a cushioning layer with a non-stick surface for contacting the component. In addition, the cushioning layer, and elastomeric biasing member can be made of conductive elastomers to provide an electrical path from a backside of the component.