Patents Represented by Attorney, Agent or Law Firm Stephen A. Ackerman
  • Patent number: 6628547
    Abstract: In the present invention a new method for program and program verify is described. The threshold voltage of the memory cell is shifted up and then measured with minimal charging and discharging of the bit lines and control gate lines. Bit line to control gate line capacitance is also used to reduce the number of voltage references needed. Program current is reduced by use of a load device coupled to the source diffusion. The result is increased program bandwidth with lower high voltage charge pump current consumption.
    Type: Grant
    Filed: February 20, 2003
    Date of Patent: September 30, 2003
    Assignee: Halo LSI, Inc.
    Inventors: Seiki Ogura, Tomoko Ogura, Nori Ogura