Abstract: A method of forming a high polysilicon resistor over a dielectric layer, comprising the following steps. A polysilicon resistor over a semiconductor structure is provided. The polysilicon resistor has a doped polysilicon layer having a first voltage coefficient of resistance and grain boundaries having a first trapping density. A to a first level of DC current is provided for a predetermined duration through the doped polysilicon layer to stress the doped polysilicon layer to partially melt the doped polysilicon layer without causing breakdown of the doped polysilicon layer. The to a first level of DC current is removed to allow recrystallization of the melted doped polysilicon layer, whereby the recrystallized doped polysilicon layer has a second voltage coefficient of resistance less than the first voltage coefficient of resistance and grain boundaries having a second trapping density that is less than the first trapping density. This makes the Rs of the polysilicon to be stable and saturated.
Type:
Grant
Filed:
July 19, 1999
Date of Patent:
September 18, 2001
Assignee:
Taiwan Semiconductor Manufacturing Company
Inventors:
Yung-Lung Hsu, Shun-Liang Hsu, Yean-Kuen Fang, Mao-Hsiung Kuo