Abstract: A chemical vapor deposition (CVD) method for forming a doped silicate glass dielectric layer within a microelectronics fabrication. There is first positioned within a reactor chamber a substrate employed within a microelectronics fabrication. There is then stabilized within the reactor chamber with respect to the substrate a first flow of a silicon source material absent a flow of a dopant source material. There is then deposited upon the substrate within the reactor chamber a doped silicate glass dielectric layer through a chemical vapor deposition (CVD) method. The doped silicate glass dielectric layer is formed employing a second flow of the silicon source material, a flow of an oxidant source material and the flow of the dopant source material. There may subsequently be formed through the doped silicate glass dielectric layer an anisotropically patterned via through an anisotropic patterning method.

Abstract: A process for creating a crown shaped storage node structure, for a DRAM capacitor structure, featuring the use of a silicon oxynitride layer, underlying the crown shaped storage node structure, has been developed. A silicon oxynitride layer is placed overlying the interlevel dielectric layers that used to protect underlying DRAM elements, and placed underlying a capacitor opening in an overlying insulator layer. A selective RIE procedure is used to create the capacitor opening, in an insulator layer, with the RIE procedure terminating at the exposure of the underlying silicon oxynitride layer. After creation of the crown shaped storage node structure, in the capacitor opening, overlying the silicon oxynitride layer at the bottom of the capacitor opening, the insulator layer used for formation of the capacitor opening, is selectively removed from the regions of silicon oxynitride layer, not covered by the overlying crown shaped storage node structure, using wet etch procedures.