Patents Represented by Attorney Stephen B. Goldman
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Patent number: 4174251Abstract: The process of etching a silicon nitride layer disposed upon a silicon substrate is completed in two steps by using a gas atmosphere composed of changing portions of CF.sub.4 and O.sub.2.Type: GrantFiled: December 1, 1977Date of Patent: November 13, 1979Assignee: ITT Industries, Inc.Inventor: Klaus Paschke
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Patent number: 4173412Abstract: A strain sensor providing an optical read-out that is suitable for use in electrically noisy environment or one subject to mechanical vibration consists of one or a set of single mode optical fibres wound round an expanding strain member. The principle of operation relies upon the fact that transverse straining of a single mode fibre destroys mode degeneracy thereby producing birefringence effects that can be rendered obversable using polarized light and a polarization analyzer.Type: GrantFiled: June 29, 1977Date of Patent: November 6, 1979Assignee: International Standard Electric CorporationInventors: Melvin M. Ramsay, Stephen Wright
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Patent number: 4171492Abstract: A zener diode is disclosed which is temperature-compensated for a special application. If a zener diode is operated with a switch shunted across it, and its on-off ratio is variable, its dissipation will vary. It is proposed to form on the zener diode crystal an additional dissipative component which is switched on/off in an opposite sense to that of the zener diode. Thus, the total dissipation remains constant.Type: GrantFiled: August 22, 1977Date of Patent: October 16, 1979Assignee: ITT Industries, Inc.Inventor: Rolf D. Burth
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Patent number: 4171528Abstract: A solderable zener diode adapted for mounting in a package of the type wherein leads or electrodes must be soldered to the diode contact pads has a shallow junction region formed by a controlled diffusion of a first type of semiconductivity impurity into a semiconductive material having a second type of semiconductivity to establish a desired zener voltage. A region of deep diffusion of first type of semiconductivity impurity is formed about and in contact with the shallow junction region, and a metal contact is electrically connected to the deep diffused region about its entire periphery. The shallow junction region is overlayed with a layer of glass and sputtered quartz and a metal contact pad is formed over the entire diffused region of the zener diode including the shallow junction region and the deep diffused region using multiple layers of contact metal.Type: GrantFiled: November 3, 1978Date of Patent: October 16, 1979Assignee: International Telephone and Telegraph CorporationInventor: Harry C. Kling
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Patent number: 4165224Abstract: In the manufacture of silica optical fibers a tube having an internal coating of a volatile dopant is locally heated by a hot zone repeatedly traversed along its length to promote shrinkage and finally collapse of the tube bore. During the shrinkage prior to the final collapse traversal a gas flow of oxygen and a halide of the volatile dopant is maintained through the tube in order firstly to provide a small overpressure to ensure circularity in the shrinkage and secondly to compensate for the tendency for dopant to be lost by volatilization.Type: GrantFiled: March 17, 1978Date of Patent: August 21, 1979Assignee: International Standard Electric CorporationInventors: John Irven, Andrew P. Harrison
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Patent number: 4118650Abstract: A flat tube display is fabricated having internal structural supports running the height of the display at selected periodic intervals. This construction permits light weight face plates and back plates to be used in the construction of displays independent of display size, yet still providing the required strength to withstand atmospheric pressure. By compressing the dot matrix of the first plate of the switching stack, relatively large areas free of the dot matrix are provided whereby the internal supports may be attached without interfering with the operation of the display. The control plates of the flat tube display are psuedo-aligned to the phosphor screen. Electrons are injected into the stack channel comprising plates at successively higher positive potentials so that self-guiding through the channels at 100% transmission is achieved.Type: GrantFiled: April 14, 1977Date of Patent: October 3, 1978Assignee: Texas Instruments IncorporatedInventor: Warner Curtis Scott
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Patent number: 4118651Abstract: A flat tube display is fabricated having internal structural supports running the height of the display at selected periodic intervals. This construction permits light weight face plates and back plates to be used in the construction of displays independent of display size, yet still providing the required stength to withstand atmospheric pressure. By compressing the dot matrix of the first plate of the switching stack, relatively large areas free of the dot matrix are provided whereby the internal supports may be attached without interferring with the operation of the display. The control plates of the flat tube display are pseudo-aligned to the phosphor screen. Electrons are injected into the stack channel comprising plates at successively higher positive potentials so that self-guiding through the channels at 100% transmission is achieved. Apertures of the control stack are fabricated into horizontal slots to provide for increased brightness as a result of greater electron transmission through the stack.Type: GrantFiled: April 14, 1977Date of Patent: October 3, 1978Assignee: Texas Instruments IncorporatedInventor: Warner Curtis Scott
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Patent number: 4116530Abstract: This disclosure concerns optical waveguides of arcuate structure fabricated by selective liquid phase epitaxy. In integrated optical circuits requiring complex processing, it will be necessary to utilize at relatively low light losses bends, curves, and dividers in the waveguide section. The arcuate optical waveguides described herein have a region of higher index of refraction surrounded by lower effective index media to confine and propagate light between active components of an integrated optical circuit. Optical waveguides extending around bends are grown by selective liquid phase epitaxy employing a horizontal graphite boat with sliding compartments, wherein multiple layers of Ga.sub.1-x Al.sub.x As(0.ltoreq.x.ltoreq.0.3) are grown. For a relatively low radius of curvature where r.sub.c = 10 mils, the angle is dominated by a sharp facet, with the faceting slowly decreasing as the radius of curvature increases, until at r.sub.Type: GrantFiled: July 29, 1976Date of Patent: September 26, 1978Assignee: Texas Instruments IncorporatedInventors: David W. Bellavance, Joe C. Campbell
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Patent number: 4114257Abstract: A method for fabricating a three-dimensional integrated optical circuit is disclosed. Selective liquid phase epitaxy is utilized to grow active electro-optic devices consisting of an I-bar mesa laser, a directional-coupler switch and a channel-waveguide modulator, and a passive electro-optic device consisting of a directional-coupler wherein all devices in the integrated optical circuit as grown on the substrate are interconnected by means of a three-dimensional waveguide structure. The active and passive device section of the substrate consists of an open area to allow for the selective epitaxial growth of an I-bar mesa laser or the formation of a metallized pattern in the fabrication of directional-coupler switches, channel-waveguide modulators and directional-couplers. Theses devices are interconnected by means of an optical waveguide structure which may have the form of a single or double heterojunction structure of the ridge waveguide type.Type: GrantFiled: September 23, 1976Date of Patent: September 19, 1978Assignee: Texas Instruments IncorporatedInventor: David Walter Bellavance
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Patent number: 4110598Abstract: In a method of mounting electronic devices, a gold lead is connected to each contact pad of each wafer in a semiconductor slice. In a parallel step, a body of wafer receiving material is secured to a support and is thereafter separated into wafer receiving members. Then, a layer of epoxy resin is applied to the slice, and the slice is secured to the wafer receiving members with each wafer mounted on a wafer receiving member and with the gold leads positioned between the wafers and the wafer receiving members. After the mounting step, the wafers comprising the slice are separated and the wafer receiving members are disengaged from the support. The resulting wafer-wafer receiving member subassemblies are subsequently fabricated into thermal printheads by mounting the wafer receiving members on heat sinks and connecting electrical conductors to the gold leads.Type: GrantFiled: April 21, 1977Date of Patent: August 29, 1978Assignee: Texas Instruments IncorporatedInventor: Richard B. Small
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Patent number: 4097819Abstract: A semiconductor laser has a semiconductor base having (100) orientation. A semiconductor mesa of a III-V material is grown on the base by liquid phase epitaxy. The semiconductor mesa has crystallographic facets perpendicular to the base and parallel to one another. The crystallographic facets from the reflecting mirrors of a lasing cavity.Type: GrantFiled: February 25, 1977Date of Patent: June 27, 1978Assignee: Texas Instruments IncorporatedInventor: David W. Bellavance
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Patent number: 4094732Abstract: In the manufacture of semiconductor devices it is often times necessary to use photomasks. It has been found that silicon material is useful as see-through photomasks when deposited on a thin film of glass. After deposition the silicon is etched to form the mask. A suitable etchant, which may be used and which does not undercut patterned material formed over the silicon, may be derived from a composition of CCl.sub.4 + N.sub.2 + Cl.sub.2 and in some instances + HCl. This etchant may also be used in patterning polysilicon leads on various silicon devices such as charged coupled devices without undercutting of the leads.Type: GrantFiled: May 26, 1977Date of Patent: June 13, 1978Assignee: Texas Instruments IncorporatedInventor: Alan R. Reinberg
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Patent number: 4093922Abstract: A television tuning system having a non-volatile memory for storing digital tune words is electrically updated by a microcomputer type architecture control circuitry. A ROM memory matrix is provided for the storage of VHF minimum and maximum binary tune words corresponding to each of twelve VHF channels in addition to a UHF minimum and maximum binary tune word encompassing all possible 72 UHF channels. Tuning of individual VHf and UHF channels is accomplished by incrementing or decrementing a given tune word within the minimum and maximum limits established in the ROM memory matrix by means of a microcomputer processing approach.Type: GrantFiled: March 17, 1977Date of Patent: June 6, 1978Assignee: Texas Instruments IncorporatedInventor: Kenneth George Buss
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Patent number: 4084130Abstract: Semiconductor laser of electrically pumped type comprising a substrate of III-V compound semiconductor material or mixed ternary III-V semiconductor composition having a mesa structure provided with a p-n junction between regions of opposite conductivity therein. An electrical power source is connected to the mesa and upon activation causes the injection of minority carriers across the p-n junction, such that laser radiation is produced from the p-n junction.Type: GrantFiled: June 11, 1976Date of Patent: April 11, 1978Assignee: Texas Instruments IncorporatedInventor: William C. Holton