Patents Represented by Attorney, Agent or Law Firm Stephen G. Stanto
  • Patent number: 6399448
    Abstract: A method for forming a multiple thickness gate oxide layer by implanting nitrogen ions in a first area of a semiconductor substrate while a second area of the semiconductor substrate is masked; implanting argon ions into the second area of the semiconductor substrate while the first area of the semiconductor substrate is masked; and thermally growing a gate oxide layer wherein, the oxide growth is retarded in the first area and enhanced in the second area. A threshold voltage implant and/or an anti-punchthrough implant can optionally be implanted into the semiconductor substrate prior to the nitrigen implant using the same implant mask as the nitrogen implant for a low voltage gate, and prior to the argon implant using the same implant mask as the argonm implant for a high voltage gate, further reducing processing steps.
    Type: Grant
    Filed: November 19, 1999
    Date of Patent: June 4, 2002
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Madhusudan Mukhopadhyay, Chivukula Subrahmanyam, Yelehanka Ramachandramurthy Pradeep