Patents Represented by Attorney, Agent or Law Firm Stephen R. Tkacs
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Patent number: 7596682Abstract: An apparatus, a method, and a computer program are provided for an architected register file system for multithread system. In conventional architected register file systems, a thread is only capable of utilizing a single register file. However, when register files of other thread are unused, the system resources are wasted. In the modified architected register file system, though, threads are enabled to utilize register files of other threads. The utilization of other thread registers is through the use of control fields added to a Status and Control Register (SCR) associated with each register file that enable and disable usage of other register files.Type: GrantFiled: April 8, 2004Date of Patent: September 29, 2009Assignee: International Business Machines CorporationInventor: David Shippy
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Patent number: 7594104Abstract: A system and method for masking a hardware boot sequence are provided. With the system and method, one of the processors of a multiprocessor system is chosen to be a boot processor. The other processors of the multiprocessor system execute masking code that generates electromagnetic and/or thermal signatures that mask the electromagnetic and/or thermal signatures of the actual boot processor. Such masking may involve running the same boot code as the boot processor but without obtaining access to security information, such as the security key for accessing the system. The electromagnetic and/or thermal signatures generated by the execution of the masking code preferably approximate the electromagnetic and/or thermal signatures of the actual boot code executing on the boot processor. In this way, it is difficult to distinguish which processor is the actual boot processor.Type: GrantFiled: June 9, 2006Date of Patent: September 22, 2009Assignee: International Business Machines CorporationInventors: Jason N. Dale, Jonathan J. DeMent, Clark M. O'Niell, Steven L. Roberts
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Patent number: 7565659Abstract: To alleviate at least some of the costs associated with context switching, addition fields, either with associated Application Program Interfaces (APIs) or coupled to application modules, can be employed to indicate points of light weight context during the operation of an application. Therefore, an operating system can pre-empt applications at points where the context is relatively light, reducing the costs on both storage and bus usage.Type: GrantFiled: July 15, 2004Date of Patent: July 21, 2009Assignee: International Business Machines CorporationInventors: Michael Norman Day, Mark Richard Nutter
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Patent number: 7558908Abstract: A structure of sequencers, a method, and a computer program are provided for performing initial and periodic calibrations in an XDR™ memory system. A memory controller that performs these calibrations is divided into identical, independent halves, with each half containing a Current/Impedance Calibration (i/z Cal) sequencer and six Bank sequencers. The i/z Cal sequencer contains three pathways that perform the XIO current and termination calibrations, and the XDR™ DRAM current and termination impedance calibrations. Each Bank sequencer contains normal read and write operation pathways that are reused to accomplish receive setup, receive hold, transmit setup, transmit hold, XIO receive, and XIO transmit timing calibrations. Initial and periodic calibrations are necessary to ensure the precise transfer of data between the XIOs and the XDR™ DRAMs.Type: GrantFiled: September 24, 2007Date of Patent: July 7, 2009Assignee: International Business Machines CorporationInventors: Mark David Bellows, Ryan Abel Heckendorf
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Patent number: 7552202Abstract: A system and method to uniquely identify identically configured branches in a distributed enterprise such that branch specific configuration information may be used to configure computing devices in the identified branch are provided. With the system and method, upon being deployed in a branch location, the computing device sends a communication to a centralized configuration server using an address provided in default initial configuration information. The communication is sent from the computing device to a branch router which adds its address to the communication. The branch router address is then used by the centralized configuration server to identify the branch and thus, configuration information for computing devices of the branch. The configuration information may then be provided to the computing device for configuration of the computing device for branch-specific operation.Type: GrantFiled: March 10, 2005Date of Patent: June 23, 2009Assignee: International Business Machines CorporationInventors: Michael Wilfrid Brown, Brian Keith Howe, Radhakrishnan Sethuraman, Manuel Silveyra
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Patent number: 7523228Abstract: A direct memory access (DMA) device is structured as a loosely coupled DMA engine (DE) and a bus engine (BE). The DE breaks the programmed data block moves into separate transactions, interprets the scatter/gather descriptors, and arbitrates among channels. The DE and BE use a combined read-write (RW) command that can be queued between the DE and the BE. The bus engine (BE) has two read queues and a write queue. The first read queue is for “new reads” and the second read queue is for “old reads,” which are reads that have been retried on the bus at least once. The BE gives absolute priority to new reads, and still avoids deadlock situations.Type: GrantFiled: September 18, 2006Date of Patent: April 21, 2009Assignee: International Business Machines CorporationInventors: Giora Biran, Luis E. De la Torre, Bernard C. Drerup, Jyoti Gupta, Richard Nicholas
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Patent number: 7519717Abstract: A network server for communicating with a network client over a network comprising: a client configuration detector for detecting a configuration of the network client; a server configurator for changing the configuration of the network server; a comparator for determining if the configuration of the network client is compatible with the configuration of the network server; and a server communications component for connecting with the network client using a connection-oriented protocol, wherein the server communications component is operable to disconnect the network client responsive to said comparator.Type: GrantFiled: December 2, 2004Date of Patent: April 14, 2009Assignee: International Business Machines CorporationInventors: Andrew J Stanford-Clark, Philip R Blake, Stephen Todd
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Patent number: 7512937Abstract: A method deploys a set of coupled data transformation modules describing a data transformation, the data transformation for transforming a data structure from a first format to a second format. The method includes receiving an instruction for selecting the set of transformation modules from a memory; converting each of the set of transformation modules to a common model format, the set of modules having at least one transformation module being of a module type of a type set including language constructed modules and visually constructed modules; and generating an executable version of the converted transformation modules suitable for execution by a data transformation engine. The executable version, when executed, transforms the data structure from the first format to the second format.Type: GrantFiled: January 8, 2004Date of Patent: March 31, 2009Assignee: International Business Machines CorporationInventors: Srinivas Chari, Crystal Su, Milorad Stefanovic, Dirk Alexander Seelemann, II
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Patent number: 7512590Abstract: A mechanism for configuring and scheduling logical discovery processes in a data processing system is provided. A discovery engine communicates with information providers to collect discovery data. An information provider is a software component whose responsibility is to discover resources and relationships between the resources and write their representations in a persistent store. Discovery directives are used to coordinate the execution of information providers.Type: GrantFiled: June 21, 2006Date of Patent: March 31, 2009Assignee: International Business Machines CorporationInventors: James R. Boykin, Alberto Giammaria, Brian J. Schlosser
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Patent number: 7506058Abstract: A method provides a layered communication stack. A connection manager manages the actual transfer of data through a single point-to-point connection crossing a respective firewall. A sessions manager multiplexes multiple sessions over the connection. A routing manager exploits the sessions manager for building a routing table dynamically. A routed sessions manager implements routed sessions between two applications at opposite ends of the system; the routed sessions manager exploits the sessions manager to let the data navigate through the firewalls, and it exploits the routing manager to address the data correctly from source to destination.Type: GrantFiled: October 31, 2002Date of Patent: March 17, 2009Assignee: International Business Machines CorporationInventors: Alex Donatelli, Marco Lerro
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Patent number: 7500035Abstract: A mechanism is provided for resolving livelock conditions in a multiple processor data processing system. When a bus unit detects a timeout condition, or potential timeout condition, the bus unit activates a livelock resolution request signal. A livelock resolution unit receives livelock resolution requests from the bus units and signals an attention to a control processor. The control processor performs actions to attempt to resolve the livelock condition. Once a bus unit that issued a livelock resolution request has managed to successfully issue its command, it deactivates its livelock resolution request. If all livelock resolution request signals are deactivated, then the control processor instructs the bus and all bus units to resume normal activity. On the other hand, if the control processor determines that a predetermined amount of time passes without any progress being made, it determines that a hang condition has occurred.Type: GrantFiled: September 19, 2006Date of Patent: March 3, 2009Assignee: International Business Machines CorporationInventors: Charles R. Johns, David J. Krolak, Peichun P. Liu, Alvan W. Ng
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Patent number: 7500164Abstract: A method for testing an integrated circuit device with asynchronous clocks or dissimilar design methodologies is provided. With the method, each clock domain has its own scan paths that do not cross domain boundaries. By eliminating the scanning across the boundaries, the requirement to have two clock grids in the asynchronously clocked domains may be eliminated. As a result, circuit area and design time with regard to the clock distribution design are reduced. In addition, removing the second clock grid, i.e. the high speed core or system clock, in the asynchronously clocked domains removes the requirement to have a multiplexing scheme for selection of clocking signals in the asynchronous domain. In addition to the above, the method provides boundary built-in-self-test logic for testing the functional crossing logic of boundaries between the clock domains in a functional mode of operation.Type: GrantFiled: June 1, 2006Date of Patent: March 3, 2009Assignee: International Business Machines CorporationInventors: Nathan P. Chelstrom, Steven R. Ferguson, Mack W. Riley
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Patent number: 7496942Abstract: A method for screening broadcast programming is provided. A viewer is configured to receive broadcast programming and to present the broadcast programming to a user. An interface is configured to receive user input from a user, the user input comprising at least a content of interest start time based on the broadcast programming. A processor is coupled to the interface and configured to store the user input and to generate a screening signal based on the user input. In a particular aspect, a broadcast recorder is coupled to the viewer and configured to store the received broadcast programming.Type: GrantFiled: April 8, 2004Date of Patent: February 24, 2009Assignee: International Business Machines CorporationInventor: Viktors Berstis
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Patent number: 7490083Abstract: An improved method for providing parallel apply in asynchronous data replication in a database system is disclosed. The improved method and system provides a high speed parallel apply of transactional changes to a target node such that the parallel nature of the application of changes does not compromise the integrity of the data. The method and system detects, tracks, and handles dependencies between transaction messages to be applied to the target node. If a transaction message has a dependency on one or more preceding transaction messages whose applications have not yet completed, that transaction message is held until the application completes. In addition, the method and system requires significantly less overhead than conventional approaches.Type: GrantFiled: February 27, 2004Date of Patent: February 10, 2009Assignee: International Business Machines CorporationInventors: Serge Bourbonnais, Elizabeth B. Hamel, Bruce G. Lindsay, Stephen J. Todd
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Patent number: 7490305Abstract: A method for driving values to “don't care” (DC) adjusted/untimed nets of an integrated circuit design to thereby identify timing problems are provided. The system and method may be utilized, for example, with logical built-in self test (LBIST) testing of an integrated circuit in which the DC adjusted (dcadj) nets for normal functional mode of the integrated circuit may not be DC adjusted for LBIST mode. By using the system and method, timing related problems associated with DC adjusted/untimed nets can be made apparent either by using simulation or semi-formal/formal analysis. For example, with regard to DC adjusted/untimed nets, the system and method may identify any violations of these nets with regard to maintaining their DC adjusted values. Such identification of violations of DC adjusted/untimed nets may be made without interfering with the static timing analysis of timed nets.Type: GrantFiled: July 17, 2006Date of Patent: February 10, 2009Assignee: International Business Machines CorporationInventors: Robert B. Gass, Yee Ja, Christoph Jaeschke
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Patent number: 7480380Abstract: A method, is provided for efficiently determining an inverse multiplicative modulo. In many public-key cryptographic algorithms, an inverse modulo is usually calculated in key generation. However, because many Reduced Instruction Set Computer (RISC) processors do not have the hardware support for division, good results are often not yielded. Therefore, to efficiently calculate hail an inverse modulo, a modified algorithm that utilizes a minimum of three division and two multiplications in conjunction with shifts and addition/subtractions is employed. The modified algorithm then is able to efficiently utilize the properties of the RISC processors to yield good results, especially when developing keys for public-key cryptographic algorithms.Type: GrantFiled: August 26, 2004Date of Patent: January 20, 2009Assignee: International Business Machines CorporationInventors: Daniel Alan Brokenshire, Mohammad Peyravian
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Patent number: 7461149Abstract: A solution provided here comprises receiving requests for a service from a plurality of customers, responding to the requests for a service, utilizing a shared infrastructure, and configuring the shared infrastructure, based on stored customer information. Another example of such a solution comprises: analyzing at least one provisioning request; assigning a priority to the provisioning request, based on performance data and stored customer information; configuring a shared infrastructure, according to the provisioning request and the priority; and responding to requests for services, utilizing the shared infrastructure.Type: GrantFiled: January 13, 2004Date of Patent: December 2, 2008Assignee: International Business Machines CorporationInventors: Miguel Edmundo Gasca, Jr., Elfred Pagan, Abigail Alice Tittizer
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Patent number: 7451172Abstract: A method for handling denormal floating point operands when the result must be normalized. A leading zero counter (lzc) on the operand B (opB) is used to limit alignment shifts when opB is denormal but is much greater than the product of operands A and C, i.e. AC. By limiting the additional shift of B during normalization, by the number of leading zeros in opB, no increase is needed in the output bus of the alignment shifter. Furthermore, the additional shift may be done either in the alignment shifter, or postponed to a later stage in the pipeline, where the result is normalized.Type: GrantFiled: February 10, 2005Date of Patent: November 11, 2008Assignee: International Business Machines CorporationInventors: Lawrence Joseph Powell, Jr., Martin Stanley Schmookler, Son Dao Trong
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Patent number: 7437667Abstract: A document processing system and method for actively processing a document targeted for one system on another system. The method of processing a document having associated field definitions targeted for a system operating in a first encoding scheme in a text editor operating in a second encoding scheme includes determining if a change to the document in the second encoding scheme violates one of the field definitions associated with the document and providing an indication to the text editor when a field definition violation is determined. The processing functions include creating, inserting, editing, deleting and formatting. The document processing system can be used when editing RPG documents in a Unicode editor for ultimate processing by a non-Unicode system such as EBCDIC DBCS. The indications can include setting a flag, which can be used by the text editor to drive visual indicators of violations, deny changes and the like.Type: GrantFiled: January 13, 2004Date of Patent: October 14, 2008Assignee: International Business Machines CorporationInventor: Adrian Storisteanu
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Patent number: 7437417Abstract: The invention relates to a message brokering system for connecting a client in a local publish/subscribe messaging system to a remote message broker. The system comprises a message broker in said local publish/subscribe messaging system and a metabroker application means representing said remote message broker. The local message broker comprises publish/subscribe means for proxying messages between the client and the metabroker application means. The metabroker application means comprises publish/subscribe means for proxying messages between the local broker and the remote broker.Type: GrantFiled: February 17, 2004Date of Patent: October 14, 2008Assignee: International Business Machines CorporationInventors: Andrew David Reynolds, Christopher Edward Sharp, Andrew James Stanford-Clark