Patents Represented by Attorney Stephen Stanton
  • Patent number: 6110787
    Abstract: A method of fabricating a MOS device having raised source/drain, raised isolation regions having isolation spacers, and a gate conductor having gate spacers is achieved. A layer of gate silicon oxide is grown over the surface of a semiconductor structure. A polysilicon layer is deposited overlying the gate silicon oxide layer. The polysilicon layer, gate silicon oxide layer and semiconductor structure are patterned and etched to form trenches. The trenches are filled with an isolation material to at least a level even with a top surface of the polysilicon layer to form raised isolation regions. The remaining polysilicon layer is patterned to remove polysilicon adjacent the raised isolation regions forming a gate conductor between the raised isolation regions. The gate conductor and the raised isolation regions having exposed sidewalls. The gate oxide layer between the gate conductor and raised isolation regions is removed.
    Type: Grant
    Filed: September 7, 1999
    Date of Patent: August 29, 2000
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Lap Chan, Ting Cheong Ang, Shyue Pong Quek, Sang Yee Loong
  • Patent number: 6100161
    Abstract: A method of fabricating a transistor, comprising the following steps. A silicon semiconductor substrate having a pad oxide portion within an active area is provided. A polysilicon layer is deposited over the silicon semiconductor substrate and over the pad oxide portion. A pad oxide layer is deposited over the polysilicon layer. Shallow isolation trench regions are formed on either side of the active area. The pad oxide layer is removed. The polysilicon layer is etched and removed over the pad oxide portion leaving polysilicon portions between the pad oxide portion and the shallow isolation trench regions. The pad oxide portion is replaced with a gate oxide portion. A gate conductor, having exposed side walls, is formed over the gate oxide portion and between the polysilicon portions. Sidewall spacers are formed on the exposed side walls of the gate conductor with the sidewall spacers contacting the polysilicon portions.
    Type: Grant
    Filed: November 18, 1999
    Date of Patent: August 8, 2000
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Xing Yu, Ying Keung Leung, Hong Yang, Shyue Fong Quek
  • Patent number: 5732715
    Abstract: A resilient composition including a thermoplastic material and gas pockets dispersed therein, where the pockets being formed by a blowing agent. A mouthpiece including a resilient thermoplastic material having a quantity of gas pockets dispersed therein. A method of making a mouthpiece achieved by first mixing a predetermined quantity of blowing agent with a resilient thermoplastic material. The mixture is then heated to a predetermined temperature forming gas pockets therein from the decomposition of the blowing agent. The mixture is then ejection molded in a mold to form the mouthpiece. A mouthpiece including a U-shaped base having a U-shaped cross-section. The base including a lower, horizontal floor with upwardly extending inner lingual and outer labial walls and having a posterior section proximate the user's molar teeth and an anterior section proximate the user's canine and incisor teeth.
    Type: Grant
    Filed: June 25, 1996
    Date of Patent: March 31, 1998
    Assignee: Safe-T-Gard Corporation
    Inventors: Scott Jacobs, Allison J. Jacobs