Abstract: The invention provides a method and apparatus for generating delays to shift edges of an EFM data stream from an EFM modulator for a CD-R and CD-RW write encoder. EFM data pulse edges may be delayed in increments of about {fraction (1/32)} Tefm where Tefm is the code rate clock of an EFM data stream output. The delays are generated by a synthesizer running at four times the EFM code rate. The synthesizer may be built using a four-stage ring oscillator. Delays are selectable based upon the write strategy matrix in coarse increments of ¼ T and fine increments of {fraction (1/32)} T. For the coarse delay, the EFM data may be passed through a four stage shift register running at Fsynth, where Tefm=4×Fsynth, allowing for a coarse delay selection of ¼ Tefm.
Type:
Grant
Filed:
May 18, 2000
Date of Patent:
August 10, 2004
Assignee:
Cirrus Logic, Inc.
Inventors:
Keisuke Kato, Syed H. Husaini, Weichi Ding
Abstract: A graphics controller circuit for minimizing an amount of data received from a host. The graphics controller circuit includes a register file with a plurality of registers. The graphics controller accepts commands addressed to virtual registers, and generates plurality of instructions including an instruction to access one of the registers in the register file. By using such a virtual register number in a command and generating several instructions in response thereto, the graphics controller circuit of the present invention minimizes the amount of data host sends over the system bus.
Type:
Grant
Filed:
June 20, 1996
Date of Patent:
May 13, 2003
Assignee:
Cirrus Logic, Inc.
Inventors:
Karl Scott Mills, Richard Charles Andrew Owen, Mark Emil Bonnelycke
Abstract: A Built-In Self-Test (BIST) circuit is employed to automatically test integrated analog to digital converters (ADC). Proposed technique applies delta-sigma (&Dgr;&Sgr;) modulator concept to ADC testing and results in a fully automated accurate test procedure suitable for differential non-linearity (DNL) and integral non-linearity (INL) testing. Additional analog circuitry does not have a significant effect on the test accuracy and the test resolution is determined by the sampling frequency of the delta-sigma modulator.