Patents Represented by Attorney Steven A. Shaw, Esq.
  • Patent number: 6041389
    Abstract: A memory 200 including an array 202 of addressable memory cells and a content addressable memory cell 207/300 for comparing a received select bit with a stored select bit and enabling access to addressed ones of the memory cells in response.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: March 21, 2000
    Assignee: E Cirrus Logic, Inc.
    Inventor: G. R. Mohan Rao