Abstract: Thiophene-containing photo acid generators having either of the following general formulas: wherein at least one of R1, R2 or R3 is thiophene or thiophene that is substituted with alkyl, alkoxy or cycloalkyl, and the remaining R1, R2 or R3, not containing a thiophene moiety, are independently selected from the group consisting of alkyl, cycloalkyl and aryl, or at least one of R1, R2 or R3 are joined together to form a cyclic moiety having from about 4 to about 8 ring carbon atoms; and Y is a counter ion, are disclosed as well as the use thereof as a component of a chemically amplified resist composition. In addition to the thiophene-containing photo acid generator, the inventive composition includes a chemically amplified base polymer, a solvent, an optional photosensitizer, an optional base, an optional dissolution modifying agent and an optional surfactant.

Abstract: A method of etching an organic antireflective film layer underlying a patterned resist layer on a semiconductor substrate by contacting the exposed organic film with a fluorocarbon and nitrogen etchant in the presence of a plasma-generated energy and removing exposed areas of the organic film with the etchant. An oxide layer underlying the organic film layer is substantially undamaged after contact with the etchant. The plasma is a high density plasma and preferably contains argon, C4F8, and nitrogen.

Abstract: A high-reliability content & addressable memory using a shadow content-addressable memory (CAM) array in parallel with a primary CAM array to increase the reliability of CAM searches. The reliability of CAM searches has been less than desired because of random environmental influences that corrupt data. The shadow CAM is written, read, and searched in parallel with the primary CAM. The search results from the parallel searches are compared and, if identical, are declared valid. If the search results are not equal, corrective action is initiated. The high-reliability content-addressable memory may be used with or without priority encoders.

Abstract: A transmitter for driving a transmission medium employs pre-distortion to predistort the signals leaving the driver so that they will have an acceptable shape when they reach their destination and have been distorted by imperfections in the transmission medium. The change to pulse height is accomplished by means of a current steering unit that directs a controllable amount of current into the line for each pulse while maintaining the total sum of current that is generated constant in order to reduce noise. Control coefficients for the current steering unit are manipulated in an nxm register that automatically maintains the total number of bits constant while bits are moved from a location that controls a first current driver to a location that controls a second current driver with different properties.

Abstract: A process for forming a multilayer film stack including a noble metal electrode and a multilayer barrier. The process includes exposing the film stack to a plasma formed of reactive species from an excitable gas mixture of argon, a chlorine bearing gas, a fluorine bearing gas and a carbon bearing gas. The method of forming the lower electrode of a capacitor includes simultaneously etching a multilayer barrier and an electrode layer.

Abstract: The invention provides a trench storage structure that includes a substrate having a trench, a capacitor conductor in the lower part of the trench, a conductive node strap in the trench adjacent the capacitor conductor, a trench top oxide above the capacitor conductor, and a conductive buried strap in the substrate adjacent the trench top oxide. The trench top oxide includes a doped trench top oxide layer above the conductive strap, and an undoped trench top oxide layer above the doped trench top oxide layer.

Abstract: An anisotropic etching process for a nitride layer of a substrate, the process comprising using an etchant gas which comprises a hydrogen-rich fluorohydrocarbon, an oxidant and a carbon source. The hydrogen-rich fluorohydrocarbon is preferably one of CH3F or CH2F2, the carbon source is preferably one of CO2 or CO, and the oxidant is preferably O2. The fluorohydrocarbon is preferably present in the gas at approximately 7%-35% by volume, the oxidant is preferably present in the gas at approximately 1%-35% by volume, and the carbon source is preferably present in the gas at approximately 30%-92%.

Abstract: A negative resist composition, comprising: (a) silicon-containing polymer with pendant fused moieties selected from the group consisting of fused aliphatic moieties, homocyclic fused aromatic moieties, and heterocyclic fused aromatic and sites for reaction with a crosslinking agent, (b) an acid-sensitive crosslinking agent, and (c) a radiation-sensitive acid generator is provided. The resist composition is used to form a patterned material layer in a substrate.

Abstract: A high-reliability content-addressable memory using a shadow content-addressable memory (CAM) array in parallel with a primary CAM array to increase the reliability of CAM searches. The reliability of CAM searches has been less than desired because of random environmental influences that corrupt data. The shadow CAM is written, read, and searched in parallel with the primary CAM. The search results from the parallel searches are compared and, if identical, are declared valid. If the search results are not equal, corrective action is initiated. The high-reliability content-addressable memory may be used with or without priority encoders.

Abstract: A process for forming a damascene structure includes depositing a bilayer comprising a first dielectric layer and a second dielectric layer onto a substrate, wherein the first layer has a dielectric constant higher than the second layer, and wherein the second layer is selected from a low k dielectric material comprising Si, C, O and H. The multi-step damascene structure is patterned into the dielectric bilayer using highly selective anisotropic reactive ion etching. Photoresist, polymers and post etch residues are removed from the substrate using a plasma ashing process without damaging the underlying dielectric layers.

Abstract: In a vertical-transistor based semiconductor structure, the problem of making a reliable electrical connection between the node of the deep trench capacitor and the lower electrode of the vertical transistor is solved by; depositing a sacrificial insulator layer, forming a vertical hardmask on the inner trench walls above the sacrificial insulator, then stripping the insulator to expose the substrate walls; diffusing dopant into the substrate walls to form a self-aligned extension of the buried strap; depositing the final gate insulator; and then forming the upper portion of the vertical transistor.

Abstract: Acid-catalyzed positive resist compositions which are imageable with 193 nm radiation and/or possibly other radiation and are developable to form resist structures of improved development characteristics and improved etch resistance are enabled by the use of resist compositions containing imaging polymer having a 2-cyano acrylic monomer.

Abstract: A memory cell structure including a planar semiconductor substrate. A deep trench is in the semiconductor substrate. The deep trench has a plurality of side walls and a bottom. A storage capacitor is at the bottom of the deep trench. A vertical transistor extends down at least one side wall of the deep trench above the storage capacitor. The transistor has a source diffusion extending in the plane of the substrate adjacent the deep trench. An isolation extends down at least one other sidewall of the deep trench opposite the vertical transistor. Shallow trench isolation regions extend along a surface of the substrate in a direction transverse to the sidewall where the vertical transistor extends. A gate conductor extends within the deep trench. A wordline extends over the deep trench and is connected to the gate conductor. A bitline extends above the surface plane of the substrate and has a contact to the source diffusion between the shallow trench isolation regions.

Abstract: Acid-catalyzed positive resist compositions which are imageable with 193 nm radiation and are developable to form resist structures of high resolution and high etch resistance are enabled by the use of a combination of (a) an imaging polymer comprising a monomer selected from the group consisting of a cyclic olefin, an acrylate and a methacrylate, (b) a radiation-sensitive acid generator, and (c) a lactone additive. The lactone additive preferably contains at least 10 carbon atoms and more preferably at least one saturated alicyclic moiety. The imaging polymer is preferably a cyclic olefin polymer.

Abstract: A multi-level package, and method for making same, that offers a small size with compartmentalized areas that allow for radiation shielding is disclosed. In its simplest embodiment, the invention comprises two cards and an interposer interposed between the two cards. The interposer preferably has an opening, and the combination of the interposer's opening and the two cards form a cavity. The cavity allows for a high amount of components to be packed into a small, three-dimensional space. The interposer supports can act like a Faraday shield. The two cards and interposer can be multi-layered and support any type of chip or package connection on each side of each card or interposer, including through-hole, surface mount, and direct-chip attachment connections. Finally, pick-up plates or heat sinks can be attached to the package.

Abstract: A method for determining the electromigration characteristics of a wiring structure in an integrated circuit device is disclosed. In an exemplary embodiment of the invention, the method includes configuring a defined test structure type for the integrated circuit device. The defined test structure type further includes a first line of wiring primarily disposed in a principal plane of a semiconductor substrate, and a second line of wiring connected to the first line of wiring. The second line of wiring is disposed in a secondary plane which is substantially parallel to the principal plane, with the first and second lines of wiring being connected by a via structure therebetween. A thermal coefficient of resistance for the first line of wiring and the via structure is determined, and a wafer-level stress condition is introduced in a first individual test structure of the defined test structure type.

Abstract: The present invention discloses a method and apparatus for a user, either an originator or a receiver of an e-mail message, to erase the e-mail message from all servers which routed the message when the e-mail message is erased from the user's client computer storage. By creating originator, server, and receiver delete tables, a pathway for a delete transaction containing the addresses of servers which routed the e-mail message enables the user, either an originator or receiver of the e-mail message, to sequentially delete the message along the pathway upon deletion from the client computer. Additionally, by inserting a deletion date into the header of the message, the message may be deleted from the client computer and all servers upon occurrence of the deletion date.

Abstract: A chemically amplified (CA) photoresist system wherein a terpolymer containing ketal/phenolic/silicon based sidechains is provided. Among other things, the terpolymers provide for improved bake technologies. In another aspect a process for lithographic treatment of a substrate by means of ketal/phenolic/silicon based compositions and corresponding processes for the production of an object, particularly an electronic component are provided.

Abstract: A DC analog circuit which monitors a DRAM sample cell access device and outputs a DC reference voltage to the word line voltage regulation system. The resulting output voltage Vpp from the word line voltage regulation system will then vary in accordance with the cell access device parametrics so as to guarantee a full high level will always be written into the DRAM cell.

Abstract: The invention provides slurry-less chemical-mechanical polishing processes which are effective in planarizing oxide materials, especially siliceous oxides, even where the starting oxide layer has significant topographical variation. The processes of the invention are preferably characterized by the use of a fixed abrasive polishing element and by use of an aqueous liquid medium containing a polyelectrolyte for at least a portion of the polishing process involving reduction in the amount of topographic variation (height differential) across the oxide material on the substrate. The method reduces or eliminates the transfer of topographic variations to levels below the desired planarization level. The processes enable elimination of special endpoint detection techniques. The processes are also especially suitable for polishing interlevel dielectrics.