Abstract: A system and method for predicting yield of integrated circuits includes a characterization vehicle (12) having at least one feature representative of at least one type of feature to be incorporated in the final integrated circuit, preferably a device neighborhood, process neighborhood characterization vehicle. The characterization vehicle (12) is subjected to process operations making up the fabrication cycle to be used in fabricating the integrated circuit in order to produce a yield model (16). The yield model (16) embodies a layout as defined by the characterization vehicle (12) and preferably includes features which facilitates the gathering of electrical test data and testing of prototype sections at operating speeds. An extraction engine (18) extracts predetermined layout attributes (26) from a proposed product layout (20).