Abstract: The apparatus engages a piercing stud's clasp, then pushes the stud out of a locked position to ease removal of the clasp. Once out of the locked position, the wearer can pull the clasp and stud from the ear, or remove the clasp while leaving the stud situated in the ear. The apparatus includes a pair of prongs which are inserted through openings in the clasp and a spoon portion which is pushed toward the prongs. The prongs and spoon are pushed toward each other. As a result, the spoon meets the distal end of the stud and pushes the stud from a locked position. An opposing force holds the clasp in place. Removal is accomplished without disturbing the wearer's ear. In particular, the stud is pushed out of the locked position by a force applied at the stud's distal end, rather than pulled out of the locked position by a force applied at the stud's bulbous end. In one embodiment, the apparatus is a pair of thongs having two arms.

Abstract: An ATE system uses a single digital to analog converter and a single analog line for defining the reference voltage levels of a plurality of pin drivers and pin sensors. An advantage of using a single DAC is that the number of components for routing the reference voltage signals is reduced. Digital values for each high and low reference voltage level for each pin driver and each pin sensor are stored in memory. Such memory is addressed sequentially reference value by reference value, converted to analog format and routed along one common analog wire to a plurality of sample and hold circuits. The plurality of sample and hold circuits receive a pin driver/sensor address and the common analog signal. The address enables one of the plurality of sample and hold circuits and selects only one output line of the enabled sample and hold circuit. Such output line is coupled to a given reference terminal (e.g., reference high or reference low) of a given pin driver or a given pin sensor.

Abstract: A modular ATE system includes a plurality of test modules and a receiver for use with a variety of fixtures to which printed circuit boards are to be coupled. Each test module includes a plurality of pin cards controlled by a single module controller. Multiple test module are included for testing a variety of functions. Test signals are generated by discrete sets of pin cards and controllers, then output to the receiver for interconnection to a fixture and printed circuit board(s) under test. A substantially wireless receiver is provided, including a translation board for electrically coupling test module pin cards to the fixture. By eliminating wiring and cabling by using a prefabricated translation board, noise is substantially reduced and test signal quality improved. The translation board defines prescribed signal mapping for interconnecting the I/O pins of ATE pin cards to the underside of the fixture. Different translation boards may have different mappings.

Abstract: A method and apparatus for in vivo detection of abnormal tissue in patients by irradiating a diagnostic region simultaneously with at least two wavelengths of incident light, and detecting the resulting fluorescence of normal and abnormal tissue. The patient is provided with a photosensitizer which preferentially collects in abnormal tissue, and beams of light--preferably at about 612 and 632.8 nm--are directed to the diagnostic region. The beams of light are chopped at 90 and 135 Hz, respectively. Fluorescent light from the diagnostic region is then detected, and an electronic signal is generated relating to the intensity of the fluorescence. Because of the chopping of the incident beams, the fluorescent light and the resulting electronic signal are also chopped. The electronic signal is provided as input to phase-locked amplifier circuitry, which differentiates between the contribution to the signal resulting from each of the 612 and 632.8 nm incident beams.

Abstract: A tri-state pin driver is formed in part, along with a pin sensor, on an integrated circuit. A pin driver and sensor are coupled to a common pin of a device under test. In normal mode, the pin driver drives a test signal. In high impedance mode, the pin driver is at a high impedance, enabling a sensor to monitor a response signal. The pin driver includes a driver stage formed off-chip by a pair of power transistors operated in the active region. The large power transistors enable a large current (i.e., +/-500 mA) to be sourced or sunk so as to drive a device under test and back-drive preceding circuits. Operating in the active region enables faster logic state transition times, and thus, a fast test rate, while reducing undesirable signal distortion. A predriver stage is configured as a unity-gain emitter follower. The predriver stage includes first and second signal paths. Each signal path includes a pair of transistors configured, during normal mode, as a transmission gate.

Abstract: A dual-sided test head for an integrated circuit test system. Each side of the test head has a floating contact surface which provides an electrical contact interface between one side of the test head and a respective load board. Each load board is part of a respective integrated circuit handling system. As the test head has two sides and a load board is contacted at each side, the floating contact surfaces facilitate docking of the test head to the respective load boards. The contactors are floating so as to have freedom of motion to rotate, tilt, offset laterally or offset vertically, relative to the test head.

Abstract: A bipolar transistor and resistor are provided. Fabrication includes using a high temperature oxide to form sidewall spacers for the transistor contacts and/or to overlay the resistor portion of the device. Deposition of the HTO is combined with dopant drive-in so that fewer total steps are required. The process is compatible with MOS technology so that the bipolar transistor and resistor can be formed on a substrate along with MOS devices.