Abstract: A field effect transistor with improved electrostatic discharge (ESD) protection has a source, a channel underlying a gate electrode and a drain. The drain includes a lightly doped ballast resistor extending across the width of the drain and separating two other drain sub-regions. One drain sub-region is located between the ballast resistor and the channel, the other drain sub-region is opposite the resistor and connected to an exterior device. The ballast resistor laterally distributes current along the width of the drain during an ESD pulse, which reduces local peak current density and reduces damage.