Abstract: The digitally programmable delay circuit to correct timing skew between data and clock is developed. The digitally programmable delay circuit may be built by cascading delay cells. The delay circuit uses delay cells comprising simple digital elements such as inverters and tri-state inverters to eliminate the intrinsic delay and achieves linearity and monotinicity. The delay cell may be used as a building module which is repeatedly used in a serial fashion. The delay range is fully programmable from the delay of one delay cell to infinity if the chip area is available. The delay range can be scaled by adding more delay cells.

Abstract: A method and system for controlling electronic component configuration. The system includes a guard including an aperture and a plate including an aperture are adjustably connected. The guard and the plate each include a pin connected thereto. The system is capable of adjusting configurations to obtain an open configuration where at least a portion of the guard and plate apertures align and a blocked configuration where the plate and the guard apertures fail to permit access. Depending on an introduced component characteristic the component's physical keying structure may be received or prevented depending on the implementation. Additionally the present invention permits retrofitting a component with a correct characteristic but lacking a keying structure by disposing plate/guard pins outside the footprint of an introduced electronic component.