Patents Represented by Attorney Suiter·Swantz PC LLO
  • Patent number: 7167939
    Abstract: A computer system having a hierarchical bus structure that allows decoupling of a local bus from a global bus thereof. Decoupling of the local bus is achieved through use of an asynchronous system bus adapter which includes a local bus adapter for handling transactions, initiated by a system device coupled to the global bus, that require access to a local device coupled to the local bus and a global bus adapter for handling transactions, initiated by a local device coupled to the local bus, that require access to a system device coupled to the system bus. The local bus adapter is further configured to issue signals which prevent the global bus adapter from handling transactions initiated by local devices coupled to the local bus while transactions initiated by system devices coupled to the global bus are on-going.
    Type: Grant
    Filed: August 5, 2004
    Date of Patent: January 23, 2007
    Assignee: LSI Logic Corporation
    Inventors: Hung T. Nguyen, Keith D. Dang
  • Patent number: 7155569
    Abstract: A code efficient transfer method in response to a single host I/O request generates a single scatter gather list. The disk array controller transforms the single host I/O request into multiple physical I/O requests. Each of these multiple physical I/O requests uses the single scatter gather list to perform the data transfer operation. Each physical I/O request corresponds to the data transfer of one data stripe. The data stripe is an initial or header stripe of about 0.5K or a stripe of at least 64K.
    Type: Grant
    Filed: June 28, 2002
    Date of Patent: December 26, 2006
    Assignee: LSI Logic Corporation
    Inventors: Stephen B. Johnson, Brad D. Besmer
  • Patent number: 7148535
    Abstract: The present invention is an apparatus and system for reducing bondpad capacitance of an integrated circuit. Circuitry of the present invention may produce a negative capacitance approximately equal in magnitude to the capacitance associated with the bondpad and thereby effectively eliminate the bondpad capacitance. Values of the components of the circuitry may be selectively and independently chosen to synthesize a variable range of negative capacitance and thus produce a negative capacitance approximately equal in magnitude to a unique capacitance associated with the bondpad of a variety of integrated circuits.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: December 12, 2006
    Assignee: LSI Logic Corporation
    Inventor: Prashant K. Singh