Abstract: A method and system which uses the method maintains data integrity during file transfers from a local drive medium to a RAID controller flash memory. A signature is added to the data file in the local drive by a utility program. The signature is multibyte and, preferably, is either four or eight bytes long. The RAID controller is loaded with software that traverses the data file until the signature is found. The RAID controller software discards the signature and any after patched data and stores the stripped off data into its flash memory. The utility program overcomes potential incompatibility between the file transfer protocol and a terminal emulation program.

Abstract: A method for populating and depopulating components of negligible impedance facilitates the testing of circuit boards. The test circuitry may be formed upon the circuit board under test. Testing may be performed with great accuracy for the time between the triggering edge of a clock pulse and a resulting valid signal change. Slew rates of bus signals may be more easily measured.

Abstract: A method for validating operation of a fiber link when the fiber link is initialized includes the steps of entering a trial link up state upon receiving a command to initialize the fiber link so that normal commands to other devices within the fiber channel loop are not resumed, and thereafter entering a final link up state and resuming normal commands to other devices within the fiber channel loop. In exemplary embodiments, the method may be implemented by devices within a system such as a disk array system of a storage area network (SAN), or the like.

Abstract: A method and circuit allows flexible control for termination of a signal line. The mode of operation of the circuit may be set manually or automatically. A software controller provides software control of the signal line. A bus terminator is tied to the signal line. A feedback line from the bus terminator permits monitoring the logic level on the signal line by the software controller. The modes permit software control of the termination or operator setting of the termination by grounding of the signal line or pulling up the signal line to the power line.

Abstract: An apparatus and method for enhancing data availability by implementing inter-storage-unit communication in a data processing system. A Remote Volume Mirroring (RVM) system may be leveraged according to the present invention to provide volume failover by enhancing the functionality of the arrays, in a manner transparent to a host.

Abstract: The present invention is directed to a method and apparatus for making mask edge corrections using a gradient method for high density chip designs. The present invention uses a newly defined cost function.

Abstract: The present invention is directed to a system and method for providing a collaborative integration of hybrid electronic and micro and sub-micro, including nano, level aggregates. A method of sampling aggregate nano behavior to determine progress by the nano aggregate toward a desired result may include sampling at least one of aggregate nano and aggregate micro behavior by a transducer. The aggregate behavior is measured through use of the sample by a macro level control apparatus. If the measured aggregate behavior is identified as diverging from progress toward a desired result, an effector is activated by the macro level control apparatus to influence the aggregate behavior toward progress toward the desired result.

Abstract: The present invention is directed to a comprehensive design flow system. A system and method are provided that provide a comprehensive system to introduce a metamethodology that integrates EDA design tools into a manageable and predictable design flow. A method of designing an integrated circuit may include accessing a design utility operating on an information handling system, displaying a dynamic template on a display device of an information handling system, wherein the dynamic template implements at least two symbols displayable on a display device, in which the at least two symbols each correspond to a respective EDA tool, and arranging the at least two symbols displayed on the display device. The at least two symbols are arranged to indicate an interrelationship of the EDA tools in a design process of an integrated circuit.