Patents Represented by Attorney, Agent or Law Firm Swernofsky Law Group
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Patent number: 6542923Abstract: The invention provides a method and system for formatting electronic mail for transmission, in which electronic mail messages include the operational results of one or more applets. An electronic mail client creates an electronic mail message using one or more applets, each of which may operate to actively receive, transform, and display information to be presented with the electronic mail message. At or near a time when the electronic mail message is formatted for transmission, editable program code for the applets is removed, and any dynamic links between the applets are broken. The electronic mail message made available to the receiver can thus include active elements, but any applets which are received are not editable by the receiver.Type: GrantFiled: August 21, 1997Date of Patent: April 1, 2003Assignee: Planet Web, Inc.Inventor: Julien T. Nguyen
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Patent number: 6516351Abstract: The invention provides a method and system for correct interoperation of multiple diverse file server or file locking protocols, using a uniform multi-protocol lock management system. A file server determines, before allowing any client device to access data or to obtain a lock, whether that would be inconsistent with existing locks, regardless of originating client device or originating protocol for those existing locks. A first protocol enforces mandatory file-open and file-locking together with an opportunistic file-locking technique, while a second protocol lacks file-open semantics and provides only for advisory byte-range and file locking. Enforcing file-locking protects file data against corruption by NFS client devices. A CIFS client device, upon opening a file, can obtain an “oplock” (an opportunistic lock).Type: GrantFiled: October 21, 1998Date of Patent: February 4, 2003Assignee: Network Appliance, Inc.Inventor: Andrea Borr
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Patent number: 6512766Abstract: The invention provides a method and system for routing information lookup for packets using routing protocols such as IP or IP multicast (IGMP), or MPLS (multiprotocol label switching, also known as tag switching or label switching) or MPLS multicast, in which both the destination address and the length of that destination address are matched using a lookup table having separate entries for selected addresses and their lengths, which can be accessed in parallel for multiple representations of destination addresses, and in which the input interface associated with the packet is included in the information used for matching.Type: GrantFiled: August 22, 1997Date of Patent: January 28, 2003Assignee: Cisco Systems, Inc.Inventor: Bruce A. Wilford
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Patent number: 6501512Abstract: An improved technique for mixing picture signals directed at a monitor screen. Two analog video signals (such as an analog VGA input and an analog RGB signal produced in response to a stored digital still or moving image) may be multiplexed in analog form. An analog chromakey mixer detects a background color in the first video signal (such as the analog VGA input), and replaces the portion of that first video signal with the second video signal. The time delays of the first video signal and the second video signal may be adjusted so that they reach the monitor screen (by means of an a multiplexer output) at the same time. An alignment detector may attempt to align two known signals (such as a VGA sync signal and a signal generated for this purpose), and may adjust a set of time delays in the analog chromakey mixer until the time difference between the first and second video signals falls below a threshold.Type: GrantFiled: July 6, 2001Date of Patent: December 31, 2002Assignee: Sigma Designs, Inc.Inventors: Julien T. Nguyen, Alain Doreau, Aurelia Popa-Radu
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Patent number: 6496942Abstract: The invention provides a storage system, and a method for operating a storage system, that provides for relatively rapid and reliable takeover among a plurality of independent file servers. Each file server maintains a reliable communication path to the others. Each file server maintains its own state in reliable memory. Each file server regularly confirms the state of the other file servers. Each file server labels messages on the redundant communication paths, so as to allow other file servers to combine the redundant communication paths into a single ordered stream of messages. Each file server maintains its own state in its persistent memory and compares that state with the ordered stream of messages, so as to determine whether other file servers have progressed beyond the file server's own last known state.Type: GrantFiled: September 8, 2000Date of Patent: December 17, 2002Assignee: Network Appliance, Inc.Inventors: Scott Schoenthal, Alan Rowe, Steven R. Kleiman
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Patent number: 6487454Abstract: An array of devices connected to each other, in a grid or other fashion, which are able to adjust their position and/or orientation relative to one another, in order to alter the overall structure that the devices form. Also, a controller that can determine this structure from data provided by the devices, and tell each device what relative position and orientation it should be in so that the overall structure changes to some other desired shape.Type: GrantFiled: March 1, 1999Date of Patent: November 26, 2002Inventor: Adrian Tymes
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Patent number: 6480969Abstract: The present invention is a method for providing error correction for an array of disks using non-volatile random access memory (NV-RAM). Non-volatile RAM is used to increase the speed of RAID recovery from a disk error(s). This is accomplished by keeping a list of all disk blocks for which the parity is possibly inconsistent. Such a list of disk blocks is much smaller than the total number of parity blocks in the RAID subsystem. The total number of parity blocks in the RAID subsystem is typically in the range of hundreds of thousands of parity blocks. Knowledge of the number of parity blocks that are possibly inconsistent makes it possible to fix only those few blocks, identified in the list, in a significantly smaller amount of time than is possible in the prior art. The technique for safely writing to a RAID array with a broken disk is complicated. In this technique, data that can become corrupted is copied into NV-RAM before the potentially corrupting operation is performed.Type: GrantFiled: June 30, 1999Date of Patent: November 12, 2002Assignee: Network Appliance, Inc.Inventors: David Hitz, Michael Malcolm, James Lau, Byron Rakitzis
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Patent number: 6468150Abstract: A redundant cooling system with abatement of noise from cooling fans being used primarily in computer equipment and other boxes housing electronic equipment. Typically either the computer system or box housing electronic components has two parallel side panels, a front panel, and a back panel upon which cooling fans are mounted to draw air across various electronic components and through the box for heat dissipation. The cooling system includes an airflow grille attached to one end of a laminar flow duct and two adjacent cooling fans mounted to the other end of a laminar flow it duct which includes a Venturi opening on the top panel of the laminar flow duct to facilitate laminar flow through the laminar flow duct at a distance before the cooling fans and at a distance after the cooling fans.Type: GrantFiled: March 30, 2001Date of Patent: October 22, 2002Assignee: Network Appliance, Inc.Inventors: Daryl J. Langdon, Robert Robbins
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Patent number: 6457015Abstract: The invention provides a method and system for monitoring status in a relatively continuous, consistent, and intelligent manner. A status monitor receives monitoring data, adaptively and dynamically builds a database of known combinations of monitoring data, and adaptively and dynamically associates those known combinations with assessments of the monitored devices, systems, or networks. From an initial set of selected knowledge that is limited (even limited to no knowledge at all), the status monitor learns those anomalous conditions that require response and what responses are appropriate. The status monitor develops a database of information regarding distinguishable conditions, and measurements of the likely causes or effects of recognizable errors or faults. When an anomalous pattern is recognized, the status monitor, responsive to the anomalous pattern, diagnoses and corrects, or informs a human operator regarding, the monitored devices, systems, or network.Type: GrantFiled: May 7, 1999Date of Patent: September 24, 2002Assignee: Network Appliance, Inc.Inventor: Paul Eastham
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Patent number: 6457130Abstract: The invention provides a method and system for enforcing file access control among client devices using multiple diverse access control models and multiple diverse file server protocols. A multi-protocol file server identifies each file with one particular access control model out of a plurality of possible models, and enforces that one particular model for all accesses to that file. When the file server receives a file server request for that file using a different access control model, the file server translates the access control limits for that file into no-less-restrictive limits in the different model. The file server restricts access by the client device using the translated access control limits. Each file is assigned the access control model of the user who created the file or who last set access control limits for the file. When a user having a different access control model sets access control limits, the access control model for the file is changed to the new model.Type: GrantFiled: March 3, 1998Date of Patent: September 24, 2002Assignee: Network Appliance, Inc.Inventors: David Hitz, Andrea Borr, Robert J. Hawley, Mark Muhlestein, Joan Pearson
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Patent number: 6448825Abstract: A method and system for synchronizing to an incoming Hsync signal, and for generating a phase locked clock signal in response thereto. The Hsync signal and an incoming clock are coupled to a sequence of modules. Each module includes a latch for sampling the incoming clock on a transition of the Hsync signal, whose output is combined (using an XOR gate) with the Hsync signal. Each module includes a time delay for generating a delayed clock signal, incrementally delayed from the previous module in the sequence, so that the clock signal for each module is phase-offset from all other modules. The latch outputs are summed using a resistor network, to produce a triangle-shaped waveform which is phase locked to the Hsync signal and which is frequency locked to the incoming clock. The triangle-shaped waveform is compared with a constant voltage to produce a square wave.Type: GrantFiled: February 17, 1998Date of Patent: September 10, 2002Assignee: Sigma Designs, Inc.Inventors: Yann Le Cornec, Alain Doreau
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Patent number: 6442651Abstract: The invention provides a method and system for reducing latency in reviewing and presenting web documents to the user. A cache coupled to one or more web clients request web documents from web servers on behalf of those web clients and communicates those web documents to the web clients for display. The cache parses the web documents as they are received from the web server, identifies references to any embedded objects, and determines if those embedded objects are already maintained in the cache. If those embedded objects are not in the cache, the cache automatically pre-fetches those embedded objects from the web server without need for a command from the web client. The cache maintains a two-level memory including primary memory and secondary mass storage. At the time the web document is received, the cache determines if any embedded objects are maintained in the cache but are not in primary memory.Type: GrantFiled: November 29, 2000Date of Patent: August 27, 2002Assignee: Cacheflow, Inc.Inventors: Doug Crow, Bert Bonkowski, Harold Czegledi, Tim Jenks
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Patent number: 6427187Abstract: The invention provides a method and system for operating multiple communicating caches. Between caches, unnecessary transmission of repeated information is substantially reduced. Each cache maintains information to improve the collective operation of the system of multiple communicating caches. This can include information about the likely contents of each other cache, or about the behavior of client devices or server devices coupled to other caches in the system. Pairs of communicating caches substantially compress transmitted information. This includes both reliable compression, in which the receiving cache can reliably identify the compressed information in response to the message, and unreliable compression, in which the receiving cache will sometimes be unable to identify the compressed information. A first cache refrains from unnecessarily transmitting the same information to a second cache when each already has a copy.Type: GrantFiled: July 31, 1998Date of Patent: July 30, 2002Assignee: Cache Flow, Inc.Inventor: Michael A. Malcolm
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Patent number: 6427203Abstract: An improved digital signal processor, in which arithmetic multiply-add instructions are performed faster with substantial accuracy. The digital signal processor performs multiply-add instructions with look-ahead rounding, so that rounding after repeated arithmetic operations proceeds much more rapidly. The digital signal processor is also augmented with additional instruction formats which are particularly useful for digital signal processing. A first additional instruction format allows the digital signal processor to incorporate a small constant immediately into an instruction, such as to add a small constant value to a register value, or to multiply a register by a small constant value; this allows the digital signal processor to conduct the arithmetic operation with only one memory lookup instead of two.Type: GrantFiled: August 22, 2000Date of Patent: July 30, 2002Assignee: Sigma Designs, Inc.Inventor: Yann Le Cornec
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Patent number: 6421096Abstract: An improved technique for mixing picture signals directed at a monitor screen. Two analog video signals (such as an analog VGA input and an analog RGB signal produced in response to a stored digital still or moving image) may be multiplexed in analog form. An analog chromakey mixer detects a background color in the first video signal (such as the analog VGA input), and replaces the portion of that first video signal with the second video signal. The time delays of the first video and the second video signal may be adjusted so that they reach the monitor screen (by means o a multiplexer output) at the same time. An alignment detector may attempt to align chromakey mixer until the time difference between the first and the second video signals falls below a threshold.Type: GrantFiled: January 5, 1998Date of Patent: July 16, 2002Assignee: Sigman Designs, Inc.Inventor: Julien T. Nguyen
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Patent number: 6412024Abstract: An improved audio-output device coupleable to a computer system, in which a DSP operating under software control emulates a common command interface. The command interface has a set of registers that are made available to the CPU for reading and writing, even if there are no such physical registers available in the device. The DSP also performs tasks in addition to audio-output, even though the audio-output device is required to respond immediately to commands from the CPU. The audio-output device has a DSP for interpreting and executing commands received from the CPU, a local memory for storing data input to or output from the DSP, a bus-interface (BIF) element for coupling the DSP and memory to a system bus, and a direct memory access (DMA) element for transferring data between the local memory and the system bus.Type: GrantFiled: September 27, 2000Date of Patent: June 25, 2002Assignee: Sigma Designs, Inc.Inventors: Mark Hsu, Yann Le Cornec, Julien T. Nguyen
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Patent number: 6400682Abstract: The disclosure relates to apparatus and methods that provide a system interconnect for transporting cells between nodes on a dual counter-rotating ring network, including a link selection register for selecting the shortest path to a destination node, use of a fault tolerant frequency reference to synchronize node clocks, interconnect initialization, multi-ring topologies along with an addressing schema and ring-to-ring couplers. The disclosure also discusses flow control of cells leaving nodes, coupling cells from one ring to another, and use of such an interconnect as a bus replacement.Type: GrantFiled: February 16, 1999Date of Patent: June 4, 2002Assignee: PLX Technology, Inc.Inventor: Jack Regula
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Patent number: 6393526Abstract: The invention provides a method and system for reducing latency in reviewing and presenting web documents to the user. A cache coupled to one or more web clients request web documents from web servers on behalf of those web clients and communicates those web documents to the web clients for display. The cache parses the web documents as they are received from the web server, identifies references to any embedded objects, and determines if those embedded objects are already maintained in the cache. If those embedded objects are not in the cache, the cache automatically prefetches those embedded objects from the web server without need for a command from the web client. The cache maintains a two-level memory including primary memory and secondary mass storage. At the time the web document is received, the cache determines if any embedded objects are maintained in the cache but are not in primary memory.Type: GrantFiled: October 28, 1997Date of Patent: May 21, 2002Assignee: Cache Plan, Inc.Inventors: Doug Crow, Bert Bonkowski, Harold Czegledi, Tim Jenks
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Patent number: 6377978Abstract: The invention provides a method and system for dynamic downloading of hypertext electronic mail messages. The system includes a mail server for receiving electronic mail messages and their headers, and a mail client for downloading electronic mail messages and their headers from the mail receiver and presenting downloaded electronic mail messages and headers to an operator. The mail client dynamically downloads and presents electronic mail messages responsive to interactive instructions from an operator, preloads and stores electronic mail messages for subsequent presentation to the operator, and organizes electronic mail messages in hypertext sections for selection by and presentation to the operator.Type: GrantFiled: September 13, 1996Date of Patent: April 23, 2002Assignee: Planetweb, Inc.Inventor: Julien Tan Nguyen
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Patent number: 6370121Abstract: The invention provides a method and system for routing traffic between LAN bridges. A method and system for enabling a blocked link to allow forwarding of traffic across the blocked link includes determining whether the blocked link is a point-to-point connection between two bridges, each one of the two bridges having a plurality of ports, ascertaining whether each one of the two bridges operates a Shortcut Trunking Exchange protocol, and calculating whether on at least one of the two bridges, a port cost of the blocked link is equal to or lower than a port cost of each other one of the plurality of ports.Type: GrantFiled: June 29, 1998Date of Patent: April 9, 2002Assignee: Cisco Technology, Inc.Inventor: Richard Hausman