Abstract: In a controller integrated circuit, which controls the operation of a peripheral storage device, a transfer monitoring circuit that facilitates the monitoring of successful transfers from outside the controller integrated circuit. The circuit includes a counter circuit that counts the number of successful transfers, a value storing register, a comparison circuit to compare the counter value to the value stored in the register and generate a result. The transfer monitoring circuit speeds up the operation of the controller integrated circuit especially during recovery from error conditions. The monitoring circuit also allows for a more optimal use of a look-ahead cache.

Abstract: A programmed computer generates descriptions of circuits (called “checkers”) that flag functional defects in a description of a circuit undergoing functional verification. The programmed computer automatically converts the circuit's description into a graph, automatically examines the graph for instances of a predetermined arrangement of nodes and connections, and automatically generates instructions that flag a behavior of a device represented by the instance in conformance with a known defective behavior. The checkers can be used during simulation or emulation of the circuit, or during operation of the circuit in a semiconductor die. The circuit's description can be in Verilog or VHDL and the automatically generated checkers can also be described in Verilog or VHDL. Therefore, the checkers can co-simulate with the circuit, monitoring the simulated operation of the circuit and flagging defective behavior.