Patents Represented by Attorney Terrance A. Meador
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Patent number: 7220273Abstract: Airflow provided through an air hose to the inlet port of an inflatable thermal device is controlled by a mechanical device disposed at an end of the air hose that is coupled to the inlet port. In response to coupling the end of the air hose to the inlet port, the mechanical device operates to open the end and permit air to flow through the air hose and the inlet port. In response to decoupling the end of the air hose from the inlet port, the mechanical device operates to block air from flowing through the end of the air hose.Type: GrantFiled: December 17, 2001Date of Patent: May 22, 2007Assignee: Arizant Healthcare Inc.,Inventors: Albert Philip Van Duren, Allen Hamid Ziaimehr, John Paul Rock, Scott Douglas Augustine, Gary Rabindranath Maharaj
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Patent number: 7054336Abstract: A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to synchronize the frame structure. The described invention permits the quantity of the frame synchronization bytes (FSBs) to be made programmable, so that the system and method are flexible for changes in communication protocols.Type: GrantFiled: December 22, 2000Date of Patent: May 30, 2006Assignee: Applied Micro Circuits CorporationInventors: George Beshara Bendak, Alan Michael Sorgi
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Patent number: 6836485Abstract: A system and method have been provided for programming synchronization features of a multidimensional digital frame structure. Such a frame structure acts as a digital wrapper and includes overhead, payload, and forward error correction (FEC) sections. Words in the overhead section are used to synchronize the frame structure. The described invention programs the number of frames, with non-recognizable frame synchronization bytes (FSBs), required for the communication link to fall out of synchronization, so that the system and method are flexible for changes in communication protocols. This flexibility also impacts the number, value, location, bandwidth, and the bit error rate (BER) of the located FSBs.Type: GrantFiled: December 22, 2000Date of Patent: December 28, 2004Assignee: Applied Micro Circuits CorporationInventors: George Beshara Bendak, Alan Michael Sorgi
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Patent number: 6830049Abstract: A laryngeal airway device for sealing against the laryngeal opening includes an air tube with proximal and distal ends and a sealing member attached to the distal end. The airway device includes a tubular extension or snout for delivering air directly into the laryngeal opening; the snout is tapered and “hooded” in a manner that facilitates effective positioning of the airway device. The sealing member includes a coupler for coupling the device to an introducer. Complementing the laryngeal airway device is an introducer that includes a track for receiving the coupler of the laryngeal airway device and guiding the sealing member to a sealing position with respect to the laryngeal inlet.Type: GrantFiled: May 23, 2002Date of Patent: December 14, 2004Assignee: Arizant Healthcare Inc.Inventors: Scott Douglas Augustine, Randall Charles Arnold, Thomas Wayne McGrail
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Patent number: 6822483Abstract: A bang-bang phase detector circuit for use in a delay lock loop is disclosed. The phase detector includes a data signal line, a clock signal line, and a delay cell having an input coupled to the data signal line. The phase detector further includes a first double flip-flop having a data input coupled to the data signal line and a clock input coupled to the clock signal line, and a second double flip-flop having a data input coupled to an output of the delay cell and a clock input coupled to the clock signal line. A NOR circuit has a first input coupled to an output of the first double flip-flop and a second input coupled to an output of the second double flip-flop. The phase detector provides a lag output signal line coupled to an output of the NOR circuit, and a lead output signal line coupled to the output of the second double flip-flop.Type: GrantFiled: April 9, 2002Date of Patent: November 23, 2004Assignee: Applied Micro Circuits CorporationInventors: Wei Fu, Joseph J. Balardeta
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Patent number: 6812576Abstract: An interconnect via structure according to the present invention can be used to support high frequency broadband signal transmission. The interconnect vias progressively increase in size and pitch from the signal source layer of the package substrate to the terminal pad layer of the package substrate. Each interconnect via includes a plurality of conductive sections formed at different substrate layers. At each substrate layer, the size and pitch of the vias result in a specified impedance. In a practical embodiment, the via impedance at each substrate layer is constant (e.g., 50 ohms). The interconnect structure can maintain a constant impedance while transitioning from a relatively narrow pitch at the signal source layer to a relatively wide pitch at the terminal layer, which may correspond to the pitch of the package substrate solder balls.Type: GrantFiled: May 14, 2002Date of Patent: November 2, 2004Assignee: Applied Micro Circuits CorporationInventors: Siamak Fazelpour, Mark Patterson
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Patent number: 6807147Abstract: An orthogonal frequency division multiplexing (OFDM) communication system includes base units which simultaneously transmit pilot tones in a predetermined pilot tone pattern during one or more time slots of a message slot. OFDM signals are received within a time slot; an OFDM signal level is determined at each frequency of a plurality of pilot tone frequencies; the signal levels and the predetermined pilot tone pattern are correlated; and a pattern detection value based on performing the correlation is generated and stored. This process is repeated for each time slot of a plurality of time slots. This process may be repeated for a plurality of message frame durations to produce a plurality of averaged pattern detection values, following which the plurality of averaged pattern detection values and a predetermined message frame pattern may be correlated. Then, a boundary of a message slot may be detected based on the correlation.Type: GrantFiled: June 13, 2000Date of Patent: October 19, 2004Assignee: AT&T Wireless Services, Inc.Inventors: Jari M. Heinonen, Michael R. Hirano, Steven E. McMeekin
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Patent number: 6798263Abstract: A differential latch circuit with a differential reset function includes a first arrangement of transistors configured to perform a latch function and a second arrangement of transistors, connected to the first arrangement of transistors, configured to perform a reset function. The first arrangement of transistors includes branches having three cascoded transistors, and the second arrangement of transistors includes branches having two cascoded transistors. This configuration enables the latch circuit to use lower power supply voltages relative to conventional latch circuits that require four more cascoded transistors.Type: GrantFiled: November 25, 2002Date of Patent: September 28, 2004Assignee: Applied Micro Circuits CorporationInventor: Christopher R. Leon
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Patent number: 6797891Abstract: A high speed flexible interconnect cable includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The transmission line structure may be realized as a grounded coplanar waveguide structure, a microstrip structure, a stripline structure, or the like. The cable can be coupled to destination components using a variety of connection techniques, e.g., direct bonding to a circuit substrate, direct soldering to a flip chip, mechanical attachment to a component, or integration with a circuit substrate. The cable can also be terminated with any number of known or standardized connector packages, e.g., SMA, GPPO, or V connectors.Type: GrantFiled: March 26, 2002Date of Patent: September 28, 2004Assignee: Applied Micro Circuits CorporationInventors: James Leroy Blair, Oswin M. Schreiber, Jeffrey Thomas Smith
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Patent number: 6794918Abstract: A clock generator circuit includes a plurality of phase delay elements connected in series. The phase delay elements provide delayed output clock signals relative to an input clock signal. The circuit employs a loop-back path that connects the output of the final phase delay element to the input of the first phase delay element. The loop-back path enables the circuit to maintain an accurate overall phase delay between the input clock signal and the output clock signal generated by the final phase delay element. When implemented to support differential clock signals, the inverted outputs of the phase delay elements also serve as delayed clock signals. In accordance with one practical embodiment, the clock phase generator circuit provides evenly distributed clock phases over one clock period.Type: GrantFiled: March 27, 2003Date of Patent: September 21, 2004Assignee: Applied Micro Circuits CorporationInventors: Hongwen Lu, Thomas Clark Bryan
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Patent number: 6795451Abstract: A method is provided for creating an auxiliary link embedded in the overhead structure of a primary data link. The primary data link is organized in a frame structure which includes data sections and header sections. Information in the header sections is used to synchronize and capture transmitted messages. However, not all the overhead bits need be used for synchronization. Bits may be selectively “robbed” from the header section and used to transfer information in an auxiliary data link. The number of bits that are used to support the auxiliary data link, as well as the placement of these bits in the header section are both selectable. An apparatus, specifically the AMCC 3062 Performance Monitor IC, has also been described which supports the establishment of an auxiliary data link in accordance with the above-mentioned method.Type: GrantFiled: March 17, 2000Date of Patent: September 21, 2004Assignee: Applied Micro Circuits CorporationInventors: Timothy E. Giorgetta, Alan M. Sorgi, Daniel M. Castagnozzi
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Patent number: 6782009Abstract: A method is provided for selectively inserting data, from a plurality of data sources, into a transmitted stream of information. The method makes a first selection to store data from at least a first and second source in a TX_OH memory. Then, the method makes a second selection, inserting the data stored in the TX_OH memory, into a transmitted stream of information. Typically, the information stream is a SONET/SDH protocol communication in a frame structure which includes overhead bytes. The provided method permits the overhead bytes of a received SONET/SDH communication to be selectively replaced with overhead bytes from either an FPGA or microprocessor source. An apparatus and system for arbitrating between multiple data sources in a communication transmission is also provided.Type: GrantFiled: March 17, 2000Date of Patent: August 24, 2004Assignee: Applied Micro Circuits CorporationInventors: Timothy E. Giorgetta, Alan M. Sorgi
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Patent number: 6775799Abstract: A method for monitoring the performance of digital communications has been provided which selectively performs Forward Error Corrections (FEC)s on the monitored data. In addition to selectively performing FEC, the process selectively decodes input data, and selectively encodes data for transmission. The decoding, FEC, and encoding operations can also be combined. Further, the process selectively performs evaluations of SONET/SDH protocol communications, Gigabit Ethernet (GBE), and other fiber channel communications, in addition to the selective decode/FEC/encode processes. An apparatus and system to enable the above-mentioned selective monitoring process has also been provided.Type: GrantFiled: March 17, 2000Date of Patent: August 10, 2004Assignee: Applied Micro Circuits CorporationInventors: Timothy E. Giorgetta, Alan M. Sorgi, Daniel M. Castagnozzi
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Patent number: 6775473Abstract: An intravenous (IV) fluid warming system with a removable heat exchanger includes a presence detector. The system is for warming an IV fluid before infusion into a body. The system includes a warming unit for warming the IV fluid and an inlet slot for receiving a heat exchanger, preferably embodied as a cassette. The heat exchanger is sized to fit into the inlet slot of the warming unit. The heat exchanger has a heat exchanger membrane with an internal fluid pathway that is in fluid communication with a fluid inlet port and a fluid outlet port. While the heat exchanger is in the warming unit, the IV fluid flows through the internal fluid pathway of the heat exchanger, warming the fluid. A heat exchanger presence detector is part of the warming system. The presence detector detects the presence of the heat exchanger when it is received in the warming unit. The presence detector enables the heating operation of the warming unit when the presence of the heat exchanger is sensed.Type: GrantFiled: November 25, 2002Date of Patent: August 10, 2004Assignee: Arizant Healthcare Inc.Inventors: Scott Douglas Augustine, Gary Rabindranath Maharaji, Allen Hamid Ziaimehr, Scott Allen Entenman
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Patent number: 6770554Abstract: The invention is a design method to lower the capacitance in high-frequency interconnect circuits built using copper dual-damascene back-end-of-line (BEOL). The method achieves lower interconnect capacitance by reducing capacitance to parasitic copper fill shapes. Parasitic capacitance is reduced physically by a) stacking copper fill shapes on each copper layer, and b) using larger dimension fill shapes. The consequence of using larger dimension fill shapes is to: a) increase white space between fill shapes, and b) reduce the summed perimeter of the fill shapes.Type: GrantFiled: March 27, 2003Date of Patent: August 3, 2004Assignee: Applied Micro Circuits CorporationInventor: Robert Bernard Welstand
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Patent number: 6771728Abstract: A digital phase detector in accordance with the present invention is capable of stable high speed operation. The phase detector operates in a half-rate manner, i.e., the digital clock frequency is one-half the digital data rate. A phase adjustment signal is generated with digital logic elements in a manner that reduces the timing requirements of the digital devices. The phase adjustment signal contains phase reference pulses having pulsewidths that are greater than or equal to the pulsewidth associated with the digital clock signal. The use of relatively wide phase reference pulses reduces the likelihood of instability and erroneous detection due to circuit speed limitations, thus resulting in an overall increase in detector performance.Type: GrantFiled: September 20, 2000Date of Patent: August 3, 2004Assignee: Applied Micro Circuits CorporationInventor: Brian Lee Abernathy
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Methods and apparatus for use in obtaining frequency synchronization in an OFDM communication system
Patent number: 6768714Abstract: A frequency correction process involves the steps of generating a plurality of tone values for a plurality of tone bins, where the plurality of tone bins includes a first set of tone bins assigned to a first frequency range and a second set of tone bins assigned to a second frequency range; performing complex conjugate multiplication between the tone values of the first and the second sets of tone bins; identifying a maximum value from results of the complex conjugate multiplication; and shifting receiver frequency based on a location of the maximum value relative to a predetermined pilot tone location.Type: GrantFiled: June 14, 2000Date of Patent: July 27, 2004Assignee: AT&T Wireless Services, Inc.Inventors: Jari M. Heinonen, Michael R. Hirano, Steven E. McMeekin -
Patent number: 6763728Abstract: A method for evaluating a seal on a package is disclosed. The method includes determining the value of a burst test force parameter. The burst test force parameter being a parameter that results from a force placed on the package during a burst test. The method also includes using the value of the burst test force parameter to determine a value of a peel test force parameter for the package. The peel test force parameter being a parameter that results from a force placed on the package during a peel test.Type: GrantFiled: October 26, 2000Date of Patent: July 20, 2004Assignee: Arizant Healthcare Inc.Inventor: Mark Christopher Albrecht
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Patent number: 6764502Abstract: Cooling pads, mattresses, and limb-conforming sleeves reduce a person's temperature by evaporative and/or conductive cooling. An open cell foam pad defines an internal air flow passages proceeding according to serpentine or other desired routing. The pad is wetted, and a blower circulates air through the air flow passage and evaporatively cools the pad by removing warm water vapor. By contacting the cooled structure, the person is conductively cooled. The pad also employs evaporative cooling if water is permitted to seep from the foam pad onto the person's skin and subsequently evaporate. Another cooling device is a multi-layer evaporative cooling mattress. The mattress comprises an open cell foam structure having a person-receiving side and a base side. At the person-receiving side lies an absorbent layer with internal liquid delivery lines, and optionally having an outer film applied thereto.Type: GrantFiled: December 28, 2001Date of Patent: July 20, 2004Assignee: Arizant Healthcare Inc.Inventor: Mark Thomas Bieberich
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Patent number: 6762494Abstract: An electronic package component includes a flip-chip device mounted to a BGA substrate. The BGA substrate includes conductive traces formed on its upper surface and configured in a coplanar waveguide structure. The package includes a dielectric coating applied over the conductive traces and over the upper surface of the substrate. The coating is formed from a material having a dielectric constant that is equal to or approximately equal to the dielectric constant of the BGA substrate material. The dielectric coating reduces the adverse effects caused by phase velocity dispersion of the signal propagated by the coplanar waveguide.Type: GrantFiled: September 24, 2002Date of Patent: July 13, 2004Assignee: Applied Micro Circuits CorporationInventors: Siamak Fazelpour, Jean-Marc Papillon, Steven J. Martin