Patents Represented by Attorney, Agent or Law Firm Testa, Hurwitz & Thibeault
  • Patent number: 6685745
    Abstract: A medical stent provides an active agent to a patient's body while simultaneously maintaining an open passageway within the body of the patient. The stent includes a first segment, a second segment, a connecting segment disposed between the first and second segments, and the active agent. The active agent may be a hemostatic agent that stops or controls bleeding by coagulation, or any other medical drug, such as, for example an antibiotic or an anticoagulant. When the stent is properly positioned within the patient's urinary system, the first segment is located on one side of the external sphincter and the second segment is located on the other side. The connecting segment is sized to extend through the external sphincter to couple the first and second segments together while not interfering with the normal operation of the external sphincter.
    Type: Grant
    Filed: May 15, 2001
    Date of Patent: February 3, 2004
    Assignee: SciMed Life Systems, Inc.
    Inventor: Kenneth P. Reever
  • Patent number: 6687851
    Abstract: The inventive system includes an I/O subsystem that controls the synchronization of an off-line CPU to an on-line CPU, such that much of the synchronization operation takes place essentially as a background task for the on-line CPU. The I/O subsystem requests that the on-line CPU provide certain register and memory state information to general purpose registers on an I/O board. The I/O subsystem then provides the register contents to general purpose registers on the off-line CPU board, and the off-line CPU uses the information to set the states of certain of its registers and memory. The I/O system further includes a DMA engine that, at a time set by the I/O subsystem, copies pages of memory from the on-line CPU to the off-line CPU. At the end of the synchronization operation, the off-line CPU is directed to write to a predetermined register on the I/O board. When the off-line CPU performs the write operation, it indicates that the off-line CPU is in a known state and ready to go on-line.
    Type: Grant
    Filed: April 13, 2000
    Date of Patent: February 3, 2004
    Assignee: Stratus Technologies Bermuda Ltd.
    Inventors: Jeffrey S. Somers, Mark D. Tetreault, Timothy M. Wegner
  • Patent number: 6687710
    Abstract: An IP library management system includes IP data segregated into two separate databases: an IP database for storing virtual component data, and an IP catalog database for storing attributes pertaining to the stored virtual component data. The IP database and IP catalog database are connected over a local area network. An IP database file server acts as the intermediary between the IP database and the local area network, while one or more database servers act as the intermediary between the IP catalog database and the local area network. The local area network may be connected to a wide area network allowing remote access by a number of remote users. The IP library management system provides an IP authoring methodology and an IP integration methodology associated with the two databases. Users may access the IP library management system through a global computer network such as the Internet.
    Type: Grant
    Filed: December 20, 1999
    Date of Patent: February 3, 2004
    Assignee: Synchronicity Software, Inc.
    Inventor: Aparna Dey
  • Patent number: 6684785
    Abstract: The present invention provides a printing member having a single radiation-absorptive multiphase layer over a substrate layer that may be imaged with or without ablation.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: February 3, 2004
    Assignee: Presstek, Inc.
    Inventor: Gerald P. Harwood, Jr.
  • Patent number: 6685744
    Abstract: An expandable ureteral stent placed in a patient's ureter so as to extend into the bladder of the patient. Expansion and contraction of the stent accommodates motion of the patient's kidney and bladder, gently holding the stent in position and reducing patient discomfort. The length of the stent is variable up to several centimeters.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: February 3, 2004
    Assignee: SciMed Life Systems, Inc.
    Inventors: Barry N. Gellman, Benjamin Bottcher
  • Patent number: 6683333
    Abstract: A thin-film transistor array comprises at least first and second transistors. Each of the first and second transistors include a shared silicon layer, i.e., an active layer. The shared semiconductor layer extends continuously between the first and second transistors, and includes a concentration of dopant that increases a resistivity of the semiconductor layer and reduces a leakage current through the semiconductor layer while permitting functioning of the transistor array.
    Type: Grant
    Filed: July 12, 2001
    Date of Patent: January 27, 2004
    Assignee: E Ink Corporation
    Inventors: Peter T. Kazlas, Michael G. Hack, Paul S. Drzaic, Guy M. Danner, Karl R. Amundson
  • Patent number: 6684259
    Abstract: A method, suitable for use in client/server system, which allows multiple copies of a single-user application to run simultaneously in a multi-user operating system without modification of the single-user program, by modifying existing operating system methods used for object name creation, look-up, and deletion. The method creates a user global context by labeling each instance of the single-user application with a user identifier (name) that defines a single-user name space in which each labeled object is only available to the named user. In addition, the single-user server process is allowed to impersonate the client for allowing the server to access the named resources of the single-user name space. A coexisting system global context is also created by marking system global named resources.
    Type: Grant
    Filed: October 11, 1995
    Date of Patent: January 27, 2004
    Assignee: Citrix Systems, Inc.
    Inventors: Michael Jerome Discavage, Edward Ernest Iacobucci
  • Patent number: 6682288
    Abstract: A substrate processing pallet has a top surface and a plurality of side surfaces. The top surface has at least one recess adapted to receive a substrate. The recess includes a support structure adapted to contact a portion of a substrate seated in the recess and a plurality of apertures each adapted to accommodate a lift pin. Lift pins can extend through the apertures initially to support the substrate and retract to deposit the substrate onto the support structure. A side surface includes a process positioning feature adapted to engage with a feature located in a process chamber to position the pallet. A side surface includes a positioning feature adapted to engage with an end effector alignment feature to position the pallet with respect to the end effector during transport. A side surface includes support features adapted to engage with end effector support features to support the pallet during transport.
    Type: Grant
    Filed: July 27, 2001
    Date of Patent: January 27, 2004
    Assignee: Nexx Systems Packaging, LLC
    Inventors: Martin P. Klein, David Felsenthal, Piero Sferlazzo
  • Patent number: 6679896
    Abstract: The present invention relates to suture spacers and methods for their use. More particularly, the present invention relates to devices which permit a surgeon to create a consistent amount of suture slack in a suture line when tying sutures under very tight space constraints including procedures such as bladder neck stabilization and treatment of hypermobility or intrinsic sphincter deficiency. Further, the present invention relates to methods of tying sutures using the disclosed devices in such procedures.
    Type: Grant
    Filed: March 28, 2002
    Date of Patent: January 20, 2004
    Assignee: SciMed Life Systems, Inc.
    Inventors: Barry N. Gellman, Ghaleb A. Sater
  • Patent number: 6680495
    Abstract: A structure with an optically active layer embedded in a Si wafer, such that the outermost epitaxial layer exposed to the CMOS processing equipment is always Si or another CMOS-compatible material such as SiO2. Since the optoelectronic layer is completely surrounded by Si, the wafer is fully compatible with standard Si CMOS manufacturing. For wavelengths of light longer than the bandgap of Si (1.1 &mgr;m), Si is completely transparent and therefore optical signals can be transmitted between the embedded optoelectronic layer and an external waveguide using either normal incidence (through the Si substrate or top Si cap layer) or in-plane incidence (edge coupling).
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: January 20, 2004
    Assignee: AmberWave Systems Corporation
    Inventor: Eugene A. Fitzergald
  • Patent number: 6680496
    Abstract: Transistors including a buried channel layer intermediate to a source and a drain and a surface layer intermediate to the buried layer and a gate are operated so as to cause current between the source and the drain to flow predominately through the buried channel layer by applying a back-bias voltage to the transistor. The back-bias voltage modulates a free charge carrier density distribution in the buried layer and in the surface layer.
    Type: Grant
    Filed: July 8, 2002
    Date of Patent: January 20, 2004
    Assignee: AmberWave Systems Corp.
    Inventors: Richard Hammond, Glyn Braithwaite
  • Patent number: 6680725
    Abstract: An electronic book comprising multiple, electronically addressable, page displays is described. Said page displays may be formed on flexible, thin substrates. Said book may additionally encompass memory, power, control functions and communications.
    Type: Grant
    Filed: October 14, 1998
    Date of Patent: January 20, 2004
    Assignee: E Ink Corporation
    Inventor: Joseph M. Jacobson
  • Patent number: 6679000
    Abstract: This application relates to apparatus for a snap lock balance shoe and system to be incorporated in pivotable double hung windows. In one embodiment, the snap lock balance shoe includes a frame, a locking member at least partially disposed within the frame, a cam in communication with the locking member and a pair of resilient tabs that partially extend through openings within an inverted window balance.
    Type: Grant
    Filed: January 11, 2002
    Date of Patent: January 20, 2004
    Assignee: Amesbury Group, Inc.
    Inventors: Stuart J. Uken, Gary R. Newman, Lawrence J. VerSteeg
  • Patent number: 6677192
    Abstract: Structures and methods for fabricating high speed digital, analog, and combined digital/analog systems using planarized relaxed SiGe as the materials platform. The relaxed SiGe allows for a plethora of strained Si layers that possess enhanced electronic properties. By allowing the MOSFET channel to be either at the surface or buried, one can create high-speed digital and/or analog circuits. The planarization before the device epitaxial layers are deposited ensures a flat surface for state-of-the-art lithography. In accordance with one embodiment of the invention, there is provided a method of fabricating a semiconductor structure including providing a relaxed Si1−xGex layer on a substrate; planarizing said relaxed Si1−xGex layer; and depositing a device heterostructure on said planarized relaxed Si1−xGex layer including at least one strained layer.
    Type: Grant
    Filed: July 16, 2001
    Date of Patent: January 13, 2004
    Assignee: AmberWave Systems Corporation
    Inventor: Eugene A. Fitzgerald
  • Patent number: 6676624
    Abstract: A ureteral drainage stent is designed to be placed in a patient's ureter and extend into a patient's bladder. An elongated tubular segment includes a distal retention structure for placement in the renal cavity, and a proximal retention structure constructed at least partly from a foam material and for placement in a urinary bladder. A central lumen connects at least one opening in the distal retention structure to the foam proximal retention structure. The foam proximal retention structure typically extends along at least a lower part of the ureter, across the ureteral-vesical junction, and into the bladder, to provide drainage through multiple networked channels.
    Type: Grant
    Filed: December 20, 2001
    Date of Patent: January 13, 2004
    Assignee: SciMed Life Systems, Inc.
    Inventor: Barry N. Gellman
  • Patent number: 6678073
    Abstract: The invention relates to a method of diffusing error caused by quantizing each pixel within an image formed of a plurality of pixels, each pixel representing a greyscale value of the image at a location (n, l) within the image, and having an original greyscale value associated therewith.
    Type: Grant
    Filed: February 8, 2000
    Date of Patent: January 13, 2004
    Assignee: Oak Technology, Inc.
    Inventor: Thomas W. Jewitt
  • Patent number: 6676623
    Abstract: A ureteral drainage stent is designed to be placed in a patient's ureter and extend into a patient's bladder. An elongated tubular segment includes a distal region for placement in the renal cavity, and a proximal region for placement in a urinary bladder. A central lumen connects at least one opening in the distal region to at least one opening in the proximal region. The elongated segment is constructed such that the wall surrounding the lumen is thinner in the proximal region than in the distal region. The thin-walled portion of the elongated segment extends along at least part of the ureter, across the ureteral vesicle junction, and from there into the bladder.
    Type: Grant
    Filed: May 4, 2001
    Date of Patent: January 13, 2004
    Assignee: SciMed Life Systems, Inc.
    Inventor: Willet F. Whitmore, III
  • Patent number: 6677655
    Abstract: A structure with an optically active layer embedded in a Si wafer, such that the outermost epitaxial layer exposed to the CMOS processing equipment is always Si or another CMOS-compatible material such as SiO2. Since the optoelectronic layer is completely surrounded by Si, the wafer is fully compatible with standard Si CMOS manufacturing. For wavelengths of light longer than the bandgap of Si (1.1 &mgr;m), Si is completely transparent and therefore optical signals can be transmitted between the embedded optoelectronic layer and an external waveguide using either normal incidence (through the Si substrate or top Si cap layer) or in-plane incidence (edge coupling).
    Type: Grant
    Filed: August 1, 2001
    Date of Patent: January 13, 2004
    Assignee: AmberWave Systems Corporation
    Inventor: Eugene A. Fitzergald
  • Patent number: D485294
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: January 13, 2004
    Assignee: E Ink Corporation
    Inventor: Jonathan D. Albert
  • Patent number: D485668
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: January 27, 2004
    Assignee: adidas International B.V.
    Inventor: Nicholas Galway