Abstract: A charge-coupled device (CCD) imager has an output shift register having a number of bits equal to at least a multiple (N), where N is an integer greater than 1, times the number of columns of pixels in the imager. Appropriately spaced in the output shift register are N groups of N outputs each for non-destructive, simultaneous readout of N.times.N bits. The N.times.N bits are then available for pre-processing or display without the requirement for having previously stored each bit, digitally represented, in a computer memory.