Abstract: An embodiment of the invention pertains to an integrated circuit that includes at least one data processing circuit that is configured to generate error data. The integrated circuit further includes a nonvolatile memory, and also a controller circuit that is coupled to the at least one data processing circuit and the nonvolatile memory. The controller circuit is configured to detect the error data. The controller circuit automatically initiates a write operation to store the error data in the nonvolatile memory in response to detecting the error data.

Abstract: An integrated circuit (“IC”) in which a debug signal is fed back within a core block is disclosed. The core block generates the debug signal. The core block includes a hardened routing that routes the debug signal within the core block. The IC also includes a programmable routing, coupled to the core block, to route the debug signal external to the core block. The hardened routing transmits the debug signal at a faster rate than the programmable routing. Further, the IC includes a selection device, coupled to the hardened routing and the programmable routing, to select one of: the hardened routed signal or the externally routed signal. In addition, the IC includes an external debug circuit, coupled to the programmable routing, to condition the externally routed signal.

Abstract: A method of operating an integrated circuit (“IC”) is disclosed. The method includes identifying one or more unused or inactive resources of the IC which will not be used in a circuit design or which are inactive during operation of the IC. The method also includes enabling resources of the IC which will be used in the circuit design, and also disabling one or more unused or inactive resources of the IC from one or more power supply terminals in response to configuration values which are stored in memory cells.

Abstract: A digital signal processing block having: 1) a first digital signal processing element including: a first multiplexer of a first plurality of multiplexers, the first multiplexer selecting between a first data input and a first zero constant input; and a first arithmetic unit coupled to the first plurality of multiplexers, the first arithmetic logic unit configured for addition; and 2) a second digital signal processing element including: a second multiplexer of a second plurality of multiplexers, the second multiplexer selecting between a second data input and a second zero constant input; and a second arithmetic unit coupled to the second plurality of multiplexers and to a third multiplexer of the first plurality of multiplexers, the second arithmetic unit configured for addition.

Abstract: A method for detecting a pattern from an arithmetic logic unit (ALU) in an integrated circuit. The method includes the steps of: generating an output from an ALU; bitwise comparing the ALU output to a pattern to produce a first output; inverting the pattern and comparing the ALU output with the inverted pattern to produce a second output; bitwise masking the first and second outputs using a mask of a plurality of masks to produce third and fourth output bits; combining the third and fourth output bits to produce first and a second output comparison bits; and storing the first and second output comparison bits in a memory.

Abstract: An Integrated Circuit (IC) having a single-instruction-multiple-data (SIMD) is disclosed. The SIMD circuit includes: a plurality of multiplexers controlled by a first opcode; and an arithmetic logic unit (ALU) coupled to the plurality of multiplexers and controlled by a second opcode; and wherein the ALU has a plurality of adders, where the plurality of adders are controlled by some bits of the second opcode, and where a first adder of the plurality of adders adds a plurality of input bits to produce first summation bits and a first carry bit; the first adder operating concurrently with the other adders of the plurality of adders.

Abstract: An integrated circuit (IC) for convergent rounding including: an adder circuit configured to produce a summation; a comparison circuit configured to bitwise compare the summation with an input pattern, bitwise mask the comparison using a mask, and combine the masked comparison to produce a comparison bit; and rounding circuitry for rounding the summation based at least in part on the comparison bit.

Abstract: An integrated circuit for pattern detection including: an arithmetic logic unit coupled to a comparison circuit, where the arithmetic logic unit is programmed by an opcode; a selected pattern of a plurality of patterns selected by a first multiplexer, where the first multiplexer is coupled to the comparison circuit; and a register coupled to the comparison circuit for storing at least a partial comparison between an output of the arithmetic logic unit and the selected pattern.

Abstract: A digital signal processing circuit having a pre-adder circuit includes; a first register block and a pre-adder circuit coupled to a multiplier circuit and to a set of multiplexers, where the set of multiplexers are controlled by an opcode, and where the pre-adder circuit has a first adder circuit; and an arithmetic logic unit (ALU) having a second adder circuit and coupled to the set of multiplexers.

Abstract: An embodiment of a computer-based method to graphically specify one or more encoder lines at which one or more nozzles of a print head is to release a droplet of an organic material includes: (1) displaying on a display device a graphical pocket representation of a pocket, the graphical pocket representation includes one or more graphical encoder line where the one or more graphical encoder line corresponds to the one or more encoder step of the pocket; (2) receiving a particular graphical encoder line where the received graphical encoder line is a subset of the one or more graphical encoder lines; (3) displaying the graphical droplet at or erasing the graphical droplet from the particular received graphical encoder line; and (4) generating one or more nozzle control values using the one or more received graphical encoder lines where the one or more nozzle control values specifies whether the corresponding nozzle releases the droplet of the organic material.

Abstract: An embodiment of the present invention pertains to an electrode that is substantially transparent and conductive and that is incorporated within an organic electronic device. This electrode includes a first layer and a second layer that is on the first layer. The electrode optionally includes a third layer on the second layer. The first layer, the second layer, and the third layer are exposed to a medium and reactions between various combinations of the first layer, the second layer, the third layer, and the medium produce the substantially transparent and conductive electrode.

Abstract: An embodiment of the present invention pertains to an electronic device such as a passive matrix display, an alpha-numeric display, a detector array, or a solar cell array. The electronic device includes multiple organic optoelectronic devices and one or more of these organic optoelectronic devices are protected from shorts. Each of the one or more organic optoelectronic devices that is protected from a short has one of its electrodes coupled to a first current limiting device and optionally has another electrode coupled to a second current limiting device. Also, one of the electrodes of that organic optoelectronic device, the first current limiting device, or the second current limiting device is patterned.

Abstract: An embodiment of an encapsulated organic optoelectronic device is described. The encapsulated device includes an organic optoelectronic device on a substrate and that organic optoelectronic device has a cathode. The encapsulated device further includes a diffusion layer that is on the organic optoelectronic device and that diffusion layer covers exposed areas of the organic optoelectronic device. An adhesive layer is on the substrate and is around a perimeter of the diffusion layer. An encapsulation lid is on the adhesive layer, and a getter is on the encapsulation lid such that the getter overlies the organic optoelectronic device. The diffusion layer slows a rate of absorption of reactive gasses by the cathode and increases a proportion of the reactive gasses absorbed by the getter relative to the cathode.

Abstract: In an embodiment of the invention, an electronic device includes an interfacial layer with traps. This interfacial layer is between an electrode and an organic layer, and if the electrode was adjacent to the organic layer, the energy barrier between these two layers is such that the current through the organic layer is limited by charge injection into this layer rather than the transport properties of the organic layer. The traps are used to accumulate charges of one charge type (e.g., either electrons or holes) within the interfacial layer. By accumulating charges, the bands of the interfacial layer are bent so that charges can tunnel from the electrode to the organic layer thus increasing the efficiency of the electronic device and allowing organic layers to be used within an electronic device that otherwise would be too inefficient for use in that device.

Abstract: In one aspect of the invention, a method for call forwarding synchronization includes allowing a telephone subsystem to forward calls for a telephonic device to a first call forwarding destination. The method also includes allowing a wireless subsystem to forward calls for a mobile station to a second call forwarding destination. The mobile station is associated with the telephonic device. The method further includes determining a registration state of the mobile station. In addition, the method includes synchronizing the call forwarding destinations for the mobile station and the telephonic device in response to a change to at least one of the registration state, the first call forwarding destination, and the second call forwarding destination.

Abstract: An embodiment of an encapsulated OLED device is described. This embodiment of the encapsulated OLED device is formed by: fabricating multiple OLED devices on a substrate; depositing at least one planarization layer on the OLED devices; hardening the at least one planarization layer in a patterned manner such that the hardened region substantially covers the OLED device; removing areas of the at least one planarization layer that are not hardened; and selectively depositing at least one barrier layer over the hardened region.

Abstract: An embodiment of the present invention pertains to an electrode that includes a metal oxide layer, and a conductive layer on that metal oxide layer. The metal oxide layer is an alkali metal oxide or an alkaline earth metal oxide that is formed by: (1) decomposing a compound that includes (a) oxygen and (b) an alkali metal or an alkaline earth metal, or (2) thermally reacting at least two compounds where one of the at least two compounds includes the alkali metal or the alkaline earth metal, and another one of the at least two compounds includes oxygen. The metal oxide layer can also be formed by thermally reacting at least two compounds where one of those compounds includes (a) oxygen and (b) an alkali metal or an alkaline earth metal.

Abstract: In an embodiment of this invention, an encapsulated electronic thin-film device includes a substrate and an active area is fabricated on the substrate. The active area is comprised of at least one electronic thin-film element. A thin-film encapsulation layer is selectively deposited on at least the active area to cover at least the active area. Traces protrude slightly past a perimeter of the thin-film encapsulation layer. The traces are routed to two or more contact pads to which one or more connectors can attach. Attaching the connector to the contact pads allows an external device to be coupled to the active area of the electronic thin-film device.

Abstract: An embodiment of the present invention pertains to encapsulating an organic electronic device by selectively depositing a catalyst layer and then exposing the catalyst layer to a monomer to produce a planarization layer. The monomer reacts only in the areas where the catalyst layer is present so there is minimal or no contamination of other areas of the organic electronic device. Selectively depositing the catalyst layer allows the resulting planarization layer to be patterned. A barrier layer is selectively deposited on at least the planarization layer. Another embodiment of the present invention pertains to encapsulating an organic electronic device by depositing a planarization layer on a transfer substrate and then allowing it to stabilize to minimize its reactivity. The planarization layer is transferred from the transfer substrate onto at least an active area of the organic electronic device. A barrier layer is selectively deposited on at least the planarization layer.

Abstract: A laser ablation system includes a first embodiment of a nozzle assembly where a laser beam is emitted through the nozzle assembly to remove materials on a target. The nozzle assembly includes a nozzle having a top end, and a window placed on the top end of the nozzle. The window includes one or more apertures and the laser beam is emitted through one of those apertures. Another laser ablation system includes a second embodiment of a nozzle assembly where a laser beam is emitted through the nozzle assembly to remove materials on a target. The nozzle assembly includes a nozzle having one or more channels at a top end of the nozzle. The nozzle assembly also includes a window that is placed on the one or more channels. A gas flows through the one or more channels and that gas flow reduces debris deposition on the window.