Abstract: A method and structure are disclosed which involve the re-wafering of previously processed and tested IC chips. The chips are encapsulated in supporting non-conductive material in a neo-wafer, so that they may be further processed preparatory to dicing layer units from the neo-wafer, which layer units are ready for stacking in a three-dimensional electronic package. Although the layer areas are the same, different stacked layers may contain different sized IC chips, and a single layer may encapsulate a plurality of chips. Precision of location of the separate IC chips in the neo-wafer is insured by use of photo-patterning means to locate openings in the neo-wafer into which extend conductive bumps on the chips. The neo-wafer is preferably formed with separate cavities in which the chips are located before they are covered with the encapsulating material.

Abstract: A structure and process are disclosed in which IC chip-containing layers are stacked to create electronic density. Each layer is formed by mechanically and electrically joining an IC-containing TSOP with an external leadframe. Each leadframe contains conductors which are disposed to connect with TSOP leads, transpose signals to other locations on the periphery of the TSOP, and/or connect with other layers in the stack. The TSOP/leadframe layers are stacked and joined, and the leadframe terminals of the lowest layer are disposed to facilitate connection with a PCB or other circuitry.

Abstract: A structure and process are disclosed in which IC chip-containing layers are stacked to create electronic density. Each layer is fabricated by forming one or more flexible circuit around a TSOP. Each flexible circuit contains conductors which are disposed to connect with TSOP leads, transpose signals to or from various locations on the top or bottom of the TSOP, and/or terminate in ball grid contacts for connection to other layers in the stack. The flexible circuit is bonded to the TSOP such that ball grid contacts are exposed on the top and bottom of the TSOP, and the ball grid array contacts on the bottom of the lowest layer are disposed to facilitate connection with a PCB or other circuitry.

Abstract: A sample immersion probe is disclosed which has an ATR (attenuated total reflectance) element at its tip. The ATR is so shaped that radiation exiting the probe will travel in paths parallel to radiation entering the probe. The angles of incidence of radiation on the ATR surface (or surfaces) which permit partial absorption by the sample material are greater than 45.degree.. At least one of the ATR surfaces in contact with the sample has a fully reflecting coating which prevents radiation absorption by the sample at that location. The ATR shape may be symmetrical or non-symmetrical with respect to the axis of symmetry of the probe. The radiation entering the probe may be in a separate light guide (i.e., path) from the radiation exiting the probe; or the entering and exiting radiation may be in the same light guide (path).

Abstract: A micro-gyro device is disclosed combining an element which oscillates around the drive axis and an element which rocks around the output axis, so arranged that Coriolis force is transmitted from one element of the other without any substantial transfer of motion of either element to the other in its own direction of motion. In other words, the masses of the two elements operate independently of one another, providing improved performance, and individual adjustability to compensate for any manufacturing imprecision. The presently-preferred device combines an outer ring which oscillates around the drive axis with an inner disk which rocks around the output axis, whenever external rotating motion occurs about the rate axis.

Abstract: Neo-chips suitable for stacking in 3D multi-layer electronic modules are formed by embedding (encapsulating) IC chips in epoxy material which provides sufficient layer rigidity after curing. The encapsulated chips are formed by placing separate IC chips, usually "known good" die, in a neo-wafer, which is subjected to certain process steps, and then diced to form neo-chips. The following benefits are obtained: (1) The starting IC chips (die) intended for stacking may have different sizes, and serve different electronic purposes. After they are encapsulated in same-size neo-chips, they can be efficiently stacked using well-developed processing steps; (2) The individual chips for stacking can be purchased as "known good" die.

Abstract: A sensing apparatus for spectral analysis in which the sensing head is bi-layered. The layer contacting the sample is formed of corrosion-resistant material, e.g., diamond. It is engaged by a supporting layer formed of infrared transparent material, e.g., zinc selenide through which radiation passes on its way to and from the sample-contacting layer. In order to avoid non-linearity in the sample absorbance results, incoming paraxial rays are all reflected in such a way that they are reflected at the same angle, and the same number of times, from the sample contacting surface of the corrosion resistant layer. The incoming rays may be reflected at a conical surface, or at a flat rooftop-like surface. The exiting rays are preferably reflected so that they are parallel to the incoming rays. Where a conical reflecting surface is used, it may be a surface of the zinc selenide layer, or a highly reflective surface provided by another element.

Abstract: A self-aligning optical beam system is disclosed in which optical alignment of two beam-carrying portions, such as a laser beam generated by a chip, and a light guide formed as a waveguide in a polymeric material, is precisely controlled by plug-and-socket connection between a substrate and a chip. Plugs in the form of solder bumps are formed on one surface of a laser chip, and are inserted in sockets provided in a substrate. The optical alignment is precisely controlled in three axes, two of which guarantee alignment for laser beam transmission into a waveguide, and one of which minimizes the gap across which the beam travels.A powerful waveguide division multiplexer may be provided by having numerous converging waveguides on a single substrate, and by stacking a number of substrates, all of whose waveguides feed into a single optical output channel.

Abstract: A process in which a plurality of IC chips are stacked in a unitary structure having a novel method of exposing leads on the access plane of the stack. After a layer of dielectric material has been formed on the access plane, trenches (preferably trenches) are formed, e.g., by wet lithographic processing, which expose the access plane leads. Thereafter terminals are formed on the access plane in contact with the leads. At the wafer level, layers of dielectric material are deposited which are sufficiently thick to permit the subsequent forming of trenches in the access plane dielectric without uncovering any of the silicon of the IC chips.

Abstract: A stationary exercise cycle is disclosed having a drive wheel which receives both user driving force and automatically controlled friction brake resistance, i.e., it is a single-stage device. Free-wheeling is provided between a user-driven shaft and the periphery of the drive wheel, which is braked by a friction belt. Automatic resistance control is provided by an electronic system, which receives actual load information from a load cell, and RPM information from a speed sensor. The friction belt is tightened or loosened by a motor-driven pulley, in response to signals indicating an "error" between load command and actual load. The load information is accurately obtained by a pivoted member to which both ends of the friction belt are attached.

Abstract: Circuitry for sensing a relatively large number of events, and outputting to processing circuitry only those events which have two characteristics: (1) a magnitude above a preselected threshold level, and (2) a rate of change greater than a preselected background rate of change. Logic circuitry is used to assign any event which has the desired characteristics to an available output channel. Subtracter circuitry causes the background to be subtracted from the sensing input, in order to limit the output to non-background events.

Abstract: An electronic package is disclosed in which a plurality of stacked "same function" IC chips are designed to be used in lieu of a single IC chip, and to fit into a host computer system, in such a way that the system is "unaware" that substitution has been made. Memory packages are of primary interest, but other packages are also feasible, such as packages of FPGA chips. In order to "translate" signals between the host system and the stacked IC chips, it is necessary to include suitable interface circuitry between the host system and the stacked chips. Specific examples are disclosed of a 4 MEG SRAM package containing 4 stacked IC chips each supplying a 1 MEG memory, and of 64 MEG DRAM packages containing 4 stacked IC chips each supplying a 16 MEG memory. The interface circuitry can be provided by a single special purpose IC chip included in the stack, referred to as a VIC chip, which chip provides both buffering and decoding circuitry. Additionally, the VIC chip should provide power supply buffering.

Abstract: A wireless infrared pulse-transmitting system for communication with electronic components. The receiver for such a system has radically reduced current (and power) values, which permit a battery-powered receiver to remain on while awaiting transmitter signals. Use of several mosfet transistors operating in the subthreshold region minimizes power. Bandwidth requirements are met, in spite of the low power operation. In order to eliminate amplifier saturation, with the accompanying problem of recovery time which slows the transmission process, clamping circuitry is used to cause instantaneous shunting of signals when a predetermined signal level is reached.

Abstract: An immersion probe (for powder or liquid) is disclosed comprising an ATR element supported at the bottom of a radiation-confining tube. The ATR element has a sample-entering tip which is either conical (preferably) or roof-top shaped. The ATR element causes entering radiation to be reflected twice by its sample-engaging surfaces, where attenuation due to the sample material occurs. The ATR element also acts as a retroreflector, causing the exiting radiation to follow a path parallel to the entering radiation. In order to avoid spurious results due to reflection by the rear surface of the ATR element, its rear surface is cone shaped or rooftop shaped, using a large apex angle.

Abstract: There is disclosed a method for the ammonia saturation of wood to impart flexibility thereto which includes the step of sealing the surfaces of ammonia-saturated wood with a polymeric film which has limited or no permeability to either or both ammonia and water vapor. Preferably, the polymeric film is flexible so the working of the wood product by bending, twisting, embossing, molding, etc. will not destroy the film. The polymeric film should also be soluble in a selected solvent, thereby permitting its removal after the wood has been formed in a final, desired shape to permit water vapor to re-establish crosslinking of the cellulose chains and restore its natural, rigid condition.

Abstract: An electronic module comprising a multiplicity of prestacked IC chips, such as memory chips, and an IC chip, referred to as an active substrate or active backplane, to which the stack of chips is directly secured. A multiplicity of aligned solder bumps may interconnect the stack and the substrate, providing electrical, mechanical and thermal interconnection. The active substrate is a layer containing substantial amounts of integrated circuitry, which interfaces, on one hand, with the integrated circuitry in the stacked chips, and, on the other hand, with the external computer bus system. Some of the high priority circuitry which may be included in the substrate is used for control, fault-tolerance, buffering, and data management.

Abstract: An integrated stack of layers incorporating a plurality of IC chip layers has an end layer which is formed of dielectric material (or covered with such material). The outer surface of the end layer provides a substantial area for the spaced location of a multiplicity of lead-out terminals, to which exterior circuitry can be readily connected. In the preferred embodiment, each lead-out terminal on the outer surface of the end layer is connected to IC circuitry embedded in the stack by means of conducting material in a hole through the end layer, and a conductor (trace) on the inner surface of the end layer which extends from the hole to the edge of the end layer, where it is connected by a T-connect to metalization on the access plane face of the stack.

Abstract: A sparging-infrared liquid analyzing system having a vessel in which a gas stream makes a single pass through a liquid stream containing contaminants, in order to provide vapor-to-liquid equilibrium of contaminants in the gas stream. The gas stream is then passed through a condenser, in which the gas temperature is precisely controlled, and the gas is cooled to a point below the dew point of water vapor in the gas stream. The gas is then flowed into a gas cell for infrared analysis. Water vapor effects are removed from the analytical output. Also, the effects of excessive depletion of relatively insoluble contaminants are removed from the analytical output.

Abstract: A probe for liquid sample analysis is disclosed which causes radiation to pass through the sample at a gap formed in the probe housing. A single radiation transmission is used to avoid problems of radiation back scatter and sample reliability. Windows are provided on opposite sand and and and and and and ides of the gap to accommodate the shape of the beam in the gap, which may either be collimated, or focused in the gap. A retroreflector may be used to reverse the radiation direction in the probe. The light to and from the probe is preferably transmitted by optical fiber cables. Within the probe, light guides other than optical fibers may be used.

Abstract: A method and product are disclosed in which multiple solder bumps on a first planar surface are guided into engagement with terminals on a second planar surface by means of holes formed (by a photolithographic process) in a dielectric layer, which has been added to the second surface to provide the holes (or sockets) through which the solder bumps (or plugs) extend. The perforated (hole-providing) layer may be formed of one of several materials. The preferred perforated layer material is a photo-definable polyimide, which is hardened by heating after the holes have been formed. Small solder bumps may be formed inside the holes on the second surface, in order to facilitate bonding between the solder bumps on the first surface and the terminals on the second surface.