Patents Represented by Attorney Thomas S. Birch, Stewart, Kolasch, and Birch Auchterlonie

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  • Multi-ported and interleaved cache memory supporting multiple simultaneous accesses thereto
    Patent number: 5924117
    Abstract: A high speed pseudo-, 8-, 16-, or greater, ported cache memory, and associated effective address generation scheme. Based upon either two-port building blocks, or twice as many single-port building blocks, which are interleaved, the cache memory is arranged as a functional equivalent to a true 8-, 16-, or greater ported interleaved cache memory.
    Type: Grant
    Filed: December 16, 1996
    Date of Patent: July 13, 1999
    Assignee: International Business Machines Corporation
    Inventor: David Arnold Luick