Abstract: A digital phase locked loop is employed to realize an output clock signal from a reference signal having a frequency which is not an integer multiple of the output clock signal frequency. This is realized by employing a programmable divider for dividing the reference signal which is dynamically controlled by a controllably variable base divisor. The base divisor control is responsive to the reference signal and to a phase error signal. The base divisor is generated to obtain a desired fractional division of the reference signal frequency and in a manner to minimize the amplitude of any resulting "high" frequency jitter in the output clock signal from the loop.

Abstract: Errorless switching of digital signals from a service channel is achieved even to an alternate channel, when the signals have a format in which the payload can float within the frame or in which the overhead bytes of the service channel may be different from the overhead bytes of the alternate channel. A preprovisioned delay is provided on the service channel. The amount of delay between corresponding frames containing the same payloads in the digital signals being transported in each channel is measured and added on the alternate channel, thus aligning the channels. The payloads within corresponding frames in the digital signals being transported in each channel are aligned by passing a pointer value indicating the start of the payload of the signal being transported in the service channel to the alternate channel and shifting the payload of the signal being transported in the alternate channel in accordance with the passed pointer value.

Abstract: Improved jitter performance is realized in a desynchronizer for obtaining an asynchronous digital signal, e.g., a DS3 signal, from a received synchronous digital signal, e.g., a SONET STS-1 signal. The improved jitter performance results from the use of a unique adaptive bit leaking arrangement in conjunction with a digital phase locked loop and synchronizing elastic store. An estimate of a bit leaking interval is adaptively obtained based on the intervals between a sequence of consecutive pointer adjustments in the received signal, i.e., the STS-1 signal. In one embodiment, the bit leaking interval estimate is obtained by employing a moving average of the intervals between the pointer adjustments. The desired bit leaking is effected by employing an accumulator which is responsive to the received pointer adjustments and a representation of the estimated bit leaking interval, in conjunction with a comparator.

Abstract: Apparatus is disclosed for incorporation into a key telephone system control unit, in at least one station port, for operating an at least one key type set and an at least one tip and ring device simultaneously bridged onto the same station port without the use of any special service circuits or adaptors. The ability to signal alerting indepenedntly via ringing signal on a TR-pair, via messages indicating alerting transmitted on a service pair for a key set or via both techniques simultaneously is also disclosed. Further, the alerting ability disclosed in combination with control by a key system controller of the access of a key set to voiceband communications over the TR-pair allows for incorporation of additional features into a key telephone system.

Abstract: Routing of packets in a packet cross-connect switch is determined based on the particular type of packet, i.e., statistical or periodic, grade of service assigned to the packet, e.g., minimum delay, the actual queuing delay at output assigned to the particular packet destination and the status of the assigned output ports. Additionally, for periodic type packets the routing decision is also based on whether an interval is reserved for transmission of periodic packets at the assigned output ports. The routing decision is also based under certain conditions on whether or not the packet has been previously scheduled over an alternate route. The actual queuing delay at the assigned output ports is compared to predetermined delay threshold values in determining the packet route and/or whether it should be discarded.

Abstract: A method and apparatus is disclosed for determining an objective measure of performance of an extended finite state machine. Many modern complex systems, for example, computer communications protocols and computer or machine user interfaces, can be represented as extended finite state machines. A formal description of the extended finite state machine is employed to obtain a canonical form description. The canomical form description, combined with a service description, is used to generate a list of canocial state transitions transited by the extended finite state machine to perform the service. From this list, an objective measurement of performance, e.g., the time required to perform a particular service, is obtained. This objective measurement may then be used as desired, for example, to select an optimum extended finite state machine from a plurality of extended finite state machines.

Abstract: A buffer/quantizer controller in a video coder utilizes the average quantization step size employed for the previous frame, the average number of bits produced per pel by the video coder for the image contained in the previous frame and current frame buffer fullness level to obtain an indication of image complexity. A target current frame quantization step size to be employed by the video coder in encoding a current frame is based on the indication of image complexity. Optionally, the target frame quantization step size is adjusted by a mapping procedure, at a predetermined intervals within each frame period, to account for the current buffer fullness. The map employed by the mapping procedure is adjusted in accordance with the target frame quantization step size.

Abstract: More efficent encoding/decoding in decomposing and recomposing a high resolution image is obtained by employing a unique pixel cluster arrangement. The pixel clusters of an image are classified as one of a plurality of classifications. A unique encoding/decoding technique is assigned to each classification. In one embodiment, a cluster including at least one high resolution pixel to be recomposed from a corresponding low resolution pixel which is a so-called exception to general prediction rules is classified as a first classification. A cluster including no pixels which are exceptions is classified as a second classification. Supplemental information is encoded/decoded for all pixels in a cluster classified as the first classification. Pixels in the cluster classified as the second classification are encoded/decoded according to the general prediction rules.

Abstract: Apparatus for digital amplitude regulation is disclosed, for use as a volume control or the like, utilizing pulse width modulation to control gain through the variation of the incremental resistance of a two terminal non-linear element, the resistance of which varies with current, e.g., a diode or diode like element. A stream of pulses, the duty cycle of which is variable and digitally controlled, is filtered to produce a quasi-continuously variable direct-current (DC) voltage. The DC voltage either directly or by providing a DC current regulates the gain of an amplifier that is amplifying the signal of interest by regulating the transmission characteristics of the diode. For low cost implementation in a system already employing a microprocessor or microcomputer the determinative duty cycle can be derived under software control and supplied as an output from a single latchable output pin.

Abstract: In entropy, e.g. arithmetic, encoding and decoding, probability estimates are needed of symbols to be encoded and subsequently decoded. More accurate probability estimates are obtained by controllably adjusting the adaptation rate of an adaptive probability estimator. The adaptation rate is optimized by matching it to the actual probability values being estimated. In particular, the adaptation rate is optimized to be proportional to the inverse of the smallest value probability being estimated. Consequently, if the probability values being estimated are not small a "fast" adaption rate is realized and if the probability values being estimated are small a necessarily slower adaptation rate is realized.

Abstract: In entropy, e.g., arithmetic or adaptive Huffman, encoding/decoding a context based on prior symbols is needed to provide accurate predictions of symbols to be encoded/decoded. Encoding/decoding efficiency is improved by employing an adaptive context extractor. The adaptive context extractor automatically adjusts the configuration of the lag intervals used to define the context. This is realized by adaptively incorporating into the context configuration at least one lag interval found to have a "good" predictive value relative to the particular symbol stream being encoded/decoded. The context configuration adjustment is such that the at least one found lag interval is exchanged with the lag interval currently in an at least one so-called floating predictor position.

Abstract: A flexible technique that is robust in the presence of noise and distortion is disclosed for locating and utilizing fiducial markings to locate predetermined areas within an image. Initially, a set of candidate markings is determined, one marking from within each of a plurality of predesignated areas of a scanned image. Thereafter, an estimate of a set of image distortion factors relative to an ideally registered image of the same type as the scanned image is derived. Predicted locations for the fiducial markings are derived using this estimated set of image distortion factors. If the difference in location between the actual location of any candidate markings and its predicted location is greater than a predetermined threshold, at least one such candidate is removed from the set of candidate markings.

Abstract: A transmission arrangement is disclosed for recovering from faults in transmission equipment or facilities forming so-called virtual circuits for transmitting packets in a network. Faults are detected in transmission paths associated with a network node and an individual fault indication message is generated for each network facility that has at least one virtual circuit affected by the fault. Each fault indication message includes the identity of each virtual circuit on the associated network facility affected by the fault. The message is transmitted in-band on at least one of the affected virtual circuits on the associated network facility. If affected virtual circuits are terminated in the node, they are switched to alternate virtual circuits. Otherwise, the fault indication messages are transmitted over the identified facilities to other unknown nodes.

Abstract: Apparatus for digital amplitude regulation is disclosed, for use as a volume control or the like, utilizing pulse width modulation to control signal transmission through a two terminal non-linear element, the resistance of which varies with current, e.g., a diode or diode like element. A stream of pulses, the duty cycle of which is variable and digitally controlled, is filtered to produce a quasi-continuously variable reference signal. The value of the reference signal regulates gain by controlling the component of the signal of interest that is actually available for amplification. For low cost implementation in a system already employing a microprocessor or microcomputer the determinative duty cycle can be derived under software control and supplied as an output from a single latchable output pin.

Abstract: Packet synchronization is obtained by employing a unique packet transport word including at least one prescribed parity check pattern in conjunction with a packet length indicator. An at least one prescribed parity check is computed over transport word length blocks of bits of an incoming packet and compared to an expected parity check pattern in predetermined bit positions in the incoming block of bits to identify possible transport word candidates. Once a transport word candidate is identified the packet length indicator is used to point to the next transport word candidate. Synchronization is declared upon obtaining a parity match for a subsequent transport word candidate pointed to by the packet length indicator. In a specific embodiment, at least two prescribed parity checks are employed to denote a possible transport word candidate.

Abstract: A subband echo canceler is disclosed in which blocks of real time are dynamically allocated to a plurality of generalized adaptive filters associated with a plurality of subbands in order to realize faster overall convergence to a desired impulse response. In one example, the real time block allocation is based on the weighted norm of the difference between the generalized adaptive filter coefficients from one sample period and an at least next subsequent sample period.

Abstract: A video processing system is disclosed that separates and separately encodes and decodes the low and high spatial frequency coefficients of images for transmission or storage. Each block of an image is transformed into the frequency domain. High frequency coefficients of the resulting transform matrix are separated from the low frequency coefficients. The low frequency coefficients are motion prediction compensated to derive motion vectors and a prediction error signal. The motion vectors, prediction error signal and high frequency coefficients are channel encoded for storage or transmission. In a receiver, the motion vectors and prediction error signal are used to reconstruct a low frequency motion-compensated version of the image. The high frequency coefficients are inverse transformed into the pel domain and are combined with the reconstructed low frequency verison of the image to reconstruct a version of the original image.

Abstract: Improved throughput is realized in a packet cross-connect switch by including an addressable memory unit in each of a plurality of input ports for storing packets and by allowing each of a plurality of output ports to address directly any one of the input ports to obtain a particular packet stored therein, which is destined for the output port. To this end, the input ports supply the packet destination and starting address of the packet stored in their memory to a scheduler. The scheduler controllably selects an output port assigned to the packet destination and supplies packet output information to the selected output port including the packet starting address and the identity of the input port storing the packet. When a particular output port is ready to obtain a particular packet, it addresses the memory unit in the particular input port to read the first packet word. The addressed packet word is supplied via a data bus to the requesting output port.

Abstract: An arrangement is disclosed for recovering from faults in transmission equipment or facilities forming so-called virtual circuits for transmitting packets in a network. Faults are detected in transmission paths associated with a network node and a fault indication is generated for any virtual circuits passing through the node that are affected by the fault. The fault indications are then transmitted on corresponding ones of the affected virtual circuits or on other designated virtual circuits. If any of the affected virtual circuits are terminated in the node, no fault indications are generated for them and they are switched to alternate virtual circuits. Otherwise, the fault indications are transmitted on corresponding virtual circuits or on other designated virtual circuits over facilities connected to the node to other unknown nodes.

Abstract: An arrangement is disclosed for recovering from faults in transmission equipment or facilities forming so-called virtual circuits for transmitting packets in a network. Faults are detected in transmission paths associated with a network node and a fault indication message is generated for each virtual circuit passing through the node that is affected by the fault. The fault indication messages are then transmitted on corresponding ones of the affected virtual circuits. If any of the affected virtual circuits are termianted in the node, they are switched to alternate virtual circuits. Otherwise, the fault indication messages are transmitted on corresponding virtual circuits over facilities connected to the node to other unknown nodes. A node receiving a fault indication message determines whether the corresponding virtual circuit is terminated at the node or passes through it to some other unknown node. If an affected virtual circuit is terminated in the node, it is switched to an alternate virtual circuit.