Abstract: Various devices for mounting circuit devices and methods of making the same are provided. In aspect, a device is provided that includes a member for holding an integrated circuit. The member contains a first plurality of carbon nanotubes to enhance the thermal conductivity thereof. At least one conductor member projects from the member. In another aspect, a method of fabricating an interface for an electronic component is provided that includes forming a member containing a first plurality of carbon nanotubes and forming at least one conductor on the member.

Abstract: Various circuit devices, including diodes, and methods manufacturing therefor are provided. In one aspect, a method manufacturing is provided that includes forming a gate structure on a semiconductor portion of a substrate. The semiconductor portion has a first conductivity type. First and spacer structures are formed on opposite sides of the gate structure. A first impurity region of a second conductivity type is formed proximate the first spacer structure while the semiconductor portion lateral to the second spacer structure is masked. The first impurity region and the semiconductor portion define a junction. A width of the second spacer structure is reduced while the second spacer structure and the first impurity region are masked. A second impurity region of the first conductivity type is formed in the semiconductor portion proximate the second spacer structure. The method provides a diode with reduced series resistance.

Abstract: Various circuit devices incorporating junction-traversing dislocation regions and methods of making the same are provided. In one aspect, a method of processing is provided that includes forming an impurity region in a device region of a semiconductor-on-insulator substrate. The impurity region defines a junction. A dislocation region is formed in the device region that traverses the junction. The dislocation region provides a pathway to neutralize charge lingering in a floating body of a device.

Abstract: Various methods of hot-electron imaging a workpiece are provided. In one aspect, a method of examining a workpiece is provided that includes directing a first photon at a photodetector at a first known time and stimulating a circuit device of the workpiece at a second known time to produce a condition in the circuit device conducive to photon emission. At least one photon emitted by the circuit device in response to the stimulation is detected. The first photon increases the quantum efficiency of the photodetector in detecting the at least one photon. The detection of the at least one photon relative to the first known time and the second known time is time correlated to temporally distinguish the first photon and the at least one photon and to temporally correlate the stimulation of the circuit device to the detection of the at least one photon.

Abstract: Methods of manufacturing are provided. In one aspect, a method of manufacturing is provided that includes forming first and second gate stacks on a substrate and forming an insulating layer on the substrate. The insulating layer has portions adjacent to the first stack and portions adjacent to the second gate stack. A first pair of insulating structures is formed adjacent to the first gate stack and a second pair of insulating structures is formed adjacent to the second gate stack. The first pair of insulating structures is removed. The portions of the insulating layer adjacent to the first gate stack are thickened while the second pair of insulating structures prevents thickening of the portions of the insulating film adjacent to the second gate stack. Differential insulating layer thickness for different gate devices is permitted to enable reduction in leakage currents for selected devices without harming speed performance for others.

Abstract: Various methods of determining ion implant dosage are disclosed. In one aspect, a method of processing a semiconductor workpiece that has a device region and an inactive region is provided. A first mask is formed on a first portion of the inactive region. A first implant of ions is performed on the device region and the first mask. A secondary ion mass spectrometry analysis of the first portion of the first mask is performed to determine a composition thereof relative to a standard composition. A dose for the first implant is determined based upon the secondary ion mass spectrometry analysis of the first portion of the first mask. The first implant dose is compared with a prescribed dose for the first implant to determine if a second implant is necessary to achieve the prescribed dose, and if so, an appropriate make-up dose for the second implant.

Abstract: Methods of patterning sidewall spacers are provided. In one aspect, a method of fabricating a circuit device includes forming a gate on a substrate and forming a first oxide spacer and a second oxide spacer adjacent to the gate. The width of the gate and the first and second oxide spacers is measured. The widths of the first and second oxide spacers are trimmed if the width of the gate and the first and second oxide spacers exceeds a preselected maximum value by exposing the first and second oxide spacers to a solution of ammonium hydroxide, hydrogen peroxide and water for a preselected like and rinsing with deionized water. Spacer width may be finely tuned to reduce the risk of weak overlap and to improve device characteristics through shorter channels.