Patents Represented by Attorney, Agent or Law Firm Timothy P. Sullivan
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Patent number: 6828851Abstract: A charge-pump circuit generates a constant voltage higher than the available power supply. A feedback path maintains the voltage at a constant level in spite of power supply, temperature and process variations. This charge pump circuit includes a switched capacitor interface arranged to generate a target voltage that is used to activate and deactivate a bypass capacitor interface to maintain the constant voltage. The bypass capacitor interface is configured to complete the feedback path. The feedback helps to ensure that node n1, that is coupled to the output of the charge pump, stays at a constant potential, irrespective of the power supply voltage.Type: GrantFiled: October 31, 2002Date of Patent: December 7, 2004Assignee: National Semiconductor CorporationInventors: Bumha Lee, Shivani Gupta, Christina Phan
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Patent number: 6789086Abstract: Retrieving information form from the registry include by creating a registry interface database containing information regarding registry data and uniquely identifying every registry entry for a registry interface. Source header files are generated using information about a program module, such as an application, contained in the registry interface database. The source header files are compiled with the application to generate the application's executable file. During run-time of the application, the registry interface is called by the application to retrieve registry data. If available, the registry interface retrieves the registry data and forwards this information to the application. In the event that the registry data is not available, the registry interface retrieves a default value in place of the registry data and forwards that default data to the application. A policy may be implemented by checking a policy area of the registry for the registry data and invoking the policy.Type: GrantFiled: April 28, 2003Date of Patent: September 7, 2004Assignee: Microsoft CorporationInventors: David Michael Gray, Kirk A. Glerum, Maithreyi Lakshmi Ratan
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Patent number: 6779736Abstract: The present invention is directed at using digital inputs in addition to an external resistor to set the trip point for a thermostat. The digital inputs are used to select a voltage (temperature) range. The value of the external resistor is used to select the specific trip point within the selected range. Since the voltage drop across the resistor is smaller than prior art methods, the tolerance of the resistor is also smaller in terms of voltage or temperature. This results in the trip point for the chip having a tighter tolerance. According to different embodiments, the digital inputs may be actively controlled or hardwired.Type: GrantFiled: July 11, 2003Date of Patent: August 24, 2004Assignee: National Semiconductor CorporationInventor: Perry Scott Lorenz
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Patent number: 6765422Abstract: The present invention enables an IC to have a fast PWM while maintaining the low frequency clock requirement of the temperature measurement. Methods are presented to increase the resolution of the control using a relatively low input clock. According to one method, the numerator and denominator of the PWM duty cycle equation are adjusted to achieve a desired resolution. According to another method, a determined number of PWM cycles are used to set the PWM duty cycle. For example, an averaging of 1024 duty cycles may be used to achieve an increased resolution of the duty cycle as compared to using only one duty cycle. According to yet another method, an error integrating loop is used to determine the level of the next cycle. The number of cycles used to reach the target PWM duty cycle depends on the desired resolution.Type: GrantFiled: June 5, 2003Date of Patent: July 20, 2004Assignee: National Semiconductor CorporationInventors: Mehmet Aslan, Richard Henderson, Chungwai Benedict Ng
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Patent number: 6731230Abstract: The present invention is directed at providing methods in a circuit for smoothing transitions relating to a signal processing function. A reference signal is produced that relates to a DAC output code. The reference signal is used as a starting point, and is compared to the input signal. A feedback signal is produced that is used to adjust the reference. The invention can be used to implement signal processing functions such as peak detection, noise filtering, peak suppression, and the like, in which the transitions in the signal are smoothed. The invention can implement these functions with a minimal complexity and a minimal die area.Type: GrantFiled: February 8, 2002Date of Patent: May 4, 2004Assignee: National Semiconductor CorporationInventors: Francisco Javier Guerrero Mercado, Gregory J. Smith, Yinming Chen, Igor Furlan
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Patent number: 6731103Abstract: The present invention implements a peak detector circuit without the use of a DSP (digital signal processor) or ADC. A reference signal is produced that relates to a DAC output code. The reference signal is used as a starting point, and is compared to the input signal. A feedback signal is produced that is used to adjust the reference signal thereby implementing a peak detector. The invention can implement these functions with a minimal complexity and a minimal die area.Type: GrantFiled: November 20, 2001Date of Patent: May 4, 2004Assignee: National Semiconductor CorporationInventor: Francisco Javier Guerrero Mercado
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Patent number: 6686723Abstract: The invention is directed towards a charging circuit for charging a cell that may be deeply discharged. A primary charging circuit charges the cell when the cell is not deeply discharged. A deeply discharged charging circuit charges the cell when the cell is deeply discharged. Determining when the cell is deeply discharged includes determining when the voltage of the cell is above, below, or equal to a predetermined threshold. According to one embodiment of the invention, the predetermined threshold is 2V. When the cell voltage is below a predetermined threshold voltage, which according to one embodiment is 0.5V, a low-voltage charging path is used to charge the cell.Type: GrantFiled: November 8, 2001Date of Patent: February 3, 2004Assignee: National Semiconductor CorporationInventors: Gregory J. Smith, Yinming Chen
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Patent number: 6678877Abstract: A method and apparatus for PCB layout of a circuit simulated over a network is provided. Techniques are provided for designing a circuit that satisfies user-specified functional requirements received over a network. Based on the specified requirements, components and a topology for constructing the circuit are automatically determined. The components determined during this operation have operational values such that, when the components are arranged according to the topology to form the circuit, the circuit satisfies the user-specified functional requirements. The components are placed on a PC board having landing areas designed to accommodate all of the anticipated component sizes for the type of circuit being designed. The PC board may be cropped to the desired size. The PCB may be cropped automatically or manually by the user. The component and topology information may be used to generate a schematic diagram that is delivered in a web page to the user over the network.Type: GrantFiled: August 15, 2001Date of Patent: January 13, 2004Assignee: National Semiconductor CorporationInventors: Jeffrey Robert Perry, Martin Garrison, Rex L. Allison, III, Richard Levin, Phil Gibson, Vandana A. Sojrani, Khang Nguyen, Wanda Carol Garrett
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Patent number: 6670832Abstract: A glitch detect filter system is described. The glitch detect filter system produces an output that is not susceptible to glitches. The glitch detect filter system provides a fixed output signal. The fixed output signal relates to the input signal loaded on the rising edge of signal Q1 or signal Q2 as determined by signal Q3. As the output signal is fixed, glitches in the input signal do not affect the output signal.Type: GrantFiled: September 19, 2002Date of Patent: December 30, 2003Assignee: National Semiconductor CorporationInventor: Sonjia Duong
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Patent number: 6670791Abstract: The present invention provides a redundant break before make digital circuit. Redundant circuits are used to provide a path to ground for a charging signal when a fault condition exists. The fault condition may be based on characteristics relating to the signal or the chip itself. For example, a fault condition may occur when a temperature measured on the chip exceeds a predetermined threshold. A fault condition may also occur when the signal is above or below a predetermined threshold. For example, a fault condition may occur when the current of the signal is above a predetermined level. The fault conditions are monitored and the state of a switch that couples the cell to the charging path is monitored. When the switch is open and a fault condition has occurred, there are redundant paths to ensure that a switch closes to provide the path to ground during the fault condition.Type: GrantFiled: February 8, 2002Date of Patent: December 30, 2003Assignee: National Semiconductor CorporationInventors: Gregory J. Smith, Yinming Chen, Igor Furlan
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Patent number: 6591210Abstract: A method and apparatus is provided that combines bandgap trim, temperature sensor trim, comparator offset trim, and the setting of the temperature trip point. A comparator compares a bandgap reference voltage and temperature sensor voltage and trips the circuit when the temperature voltage is less than the bandgap reference voltage. The temperature voltage is combined with a compensating voltage to trim the circuit and set trip point. A method is provided to adjust the compensating voltage until the circuit trips at the any desired temperature.Type: GrantFiled: November 21, 2000Date of Patent: July 8, 2003Assignee: National Semiconductor CorporationInventor: Perry Scott Lorenz
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Patent number: 6590435Abstract: A method and apparatus that restrict the differential output voltage (VOD) for an LVDS input buffer is provided. Specifically, VOD is prevented from exceeding a predetermined threshold. The input and output common-mode voltage, as well as the input and output differential voltage swing, are maintained during the VOD restriction. The VOD restriction reduces output jitter of the LVDS input buffer and provides a more robust LVDS system as compared to an LVDS system not using a VOD restriction circuit. Clamping circuits are used to restrict the VOD. Each half of the differential output voltage may be clamped to restrict the differential output voltage. The clamping circuits are activated in response to the VOD reaching the predetermined threshold. When a clamping circuit is active, an alternate current path is provided maintaining the level of the signal before clamping.Type: GrantFiled: August 16, 2001Date of Patent: July 8, 2003Assignee: National Semiconductor CorporationInventors: Douglas M. Hannan, David J. Haas
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Patent number: 6545447Abstract: A method and apparatus for placing a battery pack into a storage sleep-mode is provided. The battery pack may be set into a storage sleep-mode when the cell is in a usable mode. After being placed into the storage sleep-mode, the battery pack is awakened when a charge or load is applied to the cell that exceeds a predetermined threshold. A terminal or other end-user accessible connection is not needed to place the battery pack into the storage sleep-mode.Type: GrantFiled: May 8, 2001Date of Patent: April 8, 2003Assignee: National Semiconductor CorporationInventor: Gregory J. Smith
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Patent number: 6531846Abstract: A method and apparatus is provided for discharging an improperly charged cell. A circuit detects when an unsafe event occurs that disables the rechargeable battery. When such an event occurs, a discharge circuit discharges the cell to a level making it safer to dispose, thereby lowering the risk of explosion. A thermal circuit may also be provided that senses the temperature of the cell and discharges the cell based on the sensed temperature.Type: GrantFiled: May 3, 2001Date of Patent: March 11, 2003Assignee: National Semiconductor CorporationInventor: Gregory J. Smith
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Patent number: 6529043Abstract: The present invention provides a method and apparatus for current steering for an LVDS input buffer. A current steering circuit is configured to steer current to a first node and/or a second node in response to a comparison between the input common-mode signal and a reference signal. During high input common-mode, more current is steered to the P-channel differential pair node of the input buffer as compared to the N-channel differential pair node. During low input common-mode, more current is steered to the N-channel differential pair node of the input buffer as compared to the P-channel differential pair node. The current steering reduces jitter and achieves stable output of the input buffer over process, voltage and temperature. The method and apparatus provided ensures a stabilized summation of the currents ID1+ID3 and ID2+ID4 by steering current into the P-channel node or N-channel node.Type: GrantFiled: August 23, 2001Date of Patent: March 4, 2003Assignee: National Semiconductor CorporationInventor: Douglas M. Hannan
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Patent number: 6525573Abstract: The present invention implements a signal processing function without the use of a DSP (digital signal processor) or ADC. A reference signal is produced that relates to a DAC output code. The reference signal is used as a starting point, and is compared to the input signal. A feedback signal is produced that is used to adjust the reference. The invention can be used to implement signal processing functions such as peak detection, noise filtering, peak suppression, and the like. The invention can implement these functions with a minimal complexity and a minimal die area.Type: GrantFiled: October 26, 2001Date of Patent: February 25, 2003Assignee: National Semiconductor CorporationInventor: Francisco Javier Guerrero Mercado
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Patent number: 6515460Abstract: An apparatus and method that enforces current sharing and provides low on times for a multiphase voltage mode regulator has been described. A current level is sensed for each leg of the multiphase regulator. The sensed current level relates to the inductor current level for each of the phases. An average current level is determined from the sensed current levels. A comparison is then made between the sensed current levels and the average current level. In response to the comparison, the current level for the leg is adjusted. According to one embodiment, the on time for the switch of the phase is adjusted. The switch is adjusted to a shorter or longer time when the phase signal level is not equal to the average current level. The apparatus and method work with as few as 2-phases, or as many as N-phases.Type: GrantFiled: September 10, 2001Date of Patent: February 4, 2003Assignee: National Semiconductor CorporationInventor: Douglas Farrenkopf
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Patent number: 6493728Abstract: Compressing measure data in cell data records in a database is disclosed. The systems and methods of the invention define an efficient mechanism to compress measure data in a multidimensional database. The measure data stored in integer format within the cell record is compressed. If the measure data is constant within a measure data field then no space is used to store the measure data other than the value of the measure data stored within a header. The format used lends itself well to random access, and also to creating aggregations of the cell data.Type: GrantFiled: June 22, 2000Date of Patent: December 10, 2002Assignee: Microsoft CorporationInventor: Alexander Berger
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Patent number: 6472849Abstract: An apparatus and method is provided that blocks reverse currents. A PMOS device prevents reverse currents from draining the battery. The PMOS device is activated when a light load is detected on the cell. The light load detected may occur when the device is connected to the charger but the charger remains disconnected from a power source. A sense circuit is used to determine the voltage across a switch circuit. The reverse blocking function is activated when the cell voltage is a few millivolts above the charging signal. The reverse blocking function apparatus removes an external component from a conventional charger and integrates the function of the component onto the battery charging IC. The apparatus uses a lower compliance “on” voltage as compared to a conventional battery charger circuit that is intended to block reverse currents. The reverse blocking function apparatus integrated onto the battery charging IC requires less operating headroom as compared to a Schottky diode.Type: GrantFiled: October 1, 2001Date of Patent: October 29, 2002Assignee: National Semiconductor CorporationInventor: Gregory J. Smith
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Patent number: 6452420Abstract: A multi-dimensional differential signaling (MDDS) system is provided. A current loop is formed between N different communication lines and a corresponding differential is produced by loads coupled between the communication lines. The MDDS system may be two-dimensional or multi-dimensional. The number of communications lines chosen for the MDDS system affects the number of differential pairs in the system as well as the bits of information that may be transmitted. More than two states are provided by the MDDS system. For example, if three communication lines are used within the system, six states are provided. A star or delta load is used to produce the differential across the communication lines.Type: GrantFiled: May 24, 2001Date of Patent: September 17, 2002Assignee: National Semiconductor CorporationInventor: Hee Wong