Abstract: A non-volatile memory device of the present invention includes a page buffer having a bit line selecting circuit, a first register, a second register, a data comparing circuit, a first bit line voltage controller, and a second bit line voltage controller. The bit line selecting circuit couples selectively a certain bit line to a sensing node. The first register and the second register store given data. The data comparing circuit compares the data stored in the first register with the data stored in the second register, and transmits the comparison result to the sensing node. The first bit line voltage controller applies a voltage of low level to the bit line in accordance with a voltage level of the data stored in the first register. The second bit line voltage controller applies a selected first voltage of high level to the bit line in accordance with the data stored in the second register.

Abstract: An electronic device comprises a first plurality of configuration elements connected as a shift register for programming a subset of the programmable functions of the electronic device. The subset of programmable functions may be reprogrammed by loading configuration data into the first plurality of configuration elements such that the subset of programmable functions may be reprogrammed without necessarily reprogramming other programmable functions of the electronic device.

Abstract: A method of generating procedural language code for extracting data from a data warehouse comprising the steps of accepting a declarative specification and generating procedural language code to execute the declarative specification.

Abstract: Various techniques and novel architectures for synchronous memories that improve the overall speed and bandwidth of the memory circuit. In one embodiment, two independent clock pins are provided to help improve the data window and memory bandwidth. Other embodiments offer pin-out structures for synchronous memories that make the memory device less susceptible to noise and cross-talk, and provide for byte-controllable scheme for more flexible processing of data in memory systems.

Abstract: The invention is directed to a method for the preparation of a conditionally immortalized immortalization-helper cell (fuseme), the fusemes generated by said method, hybridoma cells prepared using said fusemes as well as a method for immortalization of mammalian cells using said fuseme cells. Further, the invention relates to the generation of T cells directed agaist tumor cells using a fuseme cell.