Patents Represented by Attorney TraskBritt
  • Patent number: 8155348
    Abstract: A post phase-inverter master volume regulator for use in combination with a tube-type musical amplifier having a phase-inverter tube. The signals at both sides of the phase-inverter tube's DC voltage plate are extracted from the amplifier for processing by the master volume regulator. In one embodiment, such signals are extracted by inserting a male/female tube base between the amplifier's phase-inverter tube and its socket. The two voltage plate signals are then transmitted through a multiconductor umbilical to an exterior enclosure. Each signal is connected to ground through its respective user adjustable rheostat, permitting the user to simultaneously change the inverter-tube's two voltage signals (and vary the amplifier's volume). The regulator may also include circuitry adapted to provide a bass-boost, and/or a high frequency cutoff. Sometimes, first and second volume controls may be provided to permit a user to quickly change between two volume settings.
    Type: Grant
    Filed: September 30, 2008
    Date of Patent: April 10, 2012
    Inventor: David William Bray
  • Patent number: 8153864
    Abstract: The invention provides a method for devitalizing plant seed, the method comprising the steps of hydrating a viable whole plant seed and freezing the hydrated whole plant seed. The invention further provides a collection of devitalized whole plant seed wherein the integrity of genomic DNA and protein within the devitalized plant seed is preserved.
    Type: Grant
    Filed: July 27, 2009
    Date of Patent: April 10, 2012
    Assignee: Dow AgroSciences LLC
    Inventors: Barry W. Schafer, Rod A. Herman
  • Patent number: 8153504
    Abstract: The invention relates to a process for manufacturing a composite substrate comprising bonding a first substrate onto a second semiconducting substrate, characterized in that the process includes, before bonding, the formation of a bonding layer between the first and the second substrate, the bonding layer comprising a plurality of islands distributed over a surface of the first substrate in a determined pattern and separated from one another by regions of a different type, which are distributed in a complementary pattern, wherein the islands are formed via a plasma treatment of the material of the first substrate.
    Type: Grant
    Filed: March 26, 2008
    Date of Patent: April 10, 2012
    Assignee: Soitec
    Inventors: Frederic Allibert, Sebastien Kerdiles
  • Patent number: 8153019
    Abstract: Methods for preventing isotropic removal of materials at corners formed by seams, keyholes, and other anomalies in films or other structures include use of etch blockers to cover or coat such corners. This covering or coating prevents exposure of the corners to isotropic etch solutions and cleaning solutions and, thus, prevents higher material removal rates at the corners than at smoother areas of the structure or film from which material is removed. Solutions, including wet etchants and cleaning solutions, that include at least one type of etch blocker are also disclosed, as are systems for preventing higher rates of material removal at corners formed by seams, crevices, or recesses in a film or other structure. Semiconductor device structures in which etch blockers are located so as to prevent isotropic etchants from removing material from corners of seams, crevices, or recesses in a surface of a film or other structure at undesirably high rates are also disclosed.
    Type: Grant
    Filed: August 6, 2007
    Date of Patent: April 10, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Nishant Sinha, J. Neil Greeley
  • Patent number: 8148263
    Abstract: A method for forming conductive vias in a substrate of a semiconductor device component includes forming one or more holes, or apertures or cavities, in the substrate so as to extend only partially through the substrate. A barrier layer, such as an insulative layer, may be formed on surfaces of each hole. Surfaces within each hole may be coated with a seed layer, which facilitates adhesion of conductive material within each hole. Conductive material is introduced into each hole. Introduction of the conductive material may be effected by deposition or plating. Alternatively, conductive material in the form of solder may be introduced into each hole.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: April 3, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Nishant Sinha
  • Patent number: 8147135
    Abstract: Methods and systems are disclosed for determining an amount of bond between a structure and sensor. A method may include heating a sensor that is operably coupled to a measuring circuit and then measuring an output signal over time. The method may further include determining, from the output signal, a percentage of bond integrity remaining between the sensor and the structure. A system may include a measurement circuit having a sensor operably coupled to a sensing system. The sensing system may be configured for applying a thermal shock to the sensor and subsequently measuring an output signal of the measuring circuit. The sensing system may also be configured for determining, from the output signal, an amount of bond between the sensor and the structure.
    Type: Grant
    Filed: March 12, 2008
    Date of Patent: April 3, 2012
    Assignee: Alliant Techsystems Inc.
    Inventors: John L. Shipley, Jerry W. Jenson, Mark R. Eggett
  • Patent number: 8150158
    Abstract: A sensing apparatus is provided for the determination of at least one of rank or suit of a playing card. The sensing apparatus includes an imaging array capable of sensing at least an area of a playing card that represents rank and or suit. A position sensor is provided for determining card position. A hardware component receives signals from the imaging array and the card position sensor. The hardware component forms a vector set from the output from the imaging array and card position sensor, and compares the vector set to known reference vector sets to determine rank and suit of a card.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: April 3, 2012
    Assignee: Shuffle Master, Inc.
    Inventor: Justin G. Downs, III
  • Patent number: 8148780
    Abstract: Methods, devices, and systems are disclosed for a memory cell having a floating body. A memory cell may include a transistor over an insulation layer, the transistor including a source, and a drain. The memory cell may also include a floating body including a first region positioned between the source and the drain, a second region positioned remote from each of the source and drain, and a passage extending through the insulation layer and coupling the first region to the second region. Additionally, the memory cell may include a bias gate at least partially surrounding the second region and configured for operably coupling to a bias voltage. Furthermore, the memory cell may include a plurality of dielectric layers, wherein each outer vertical surface of the second region has a dielectric layer of the plurality adjacent thereto.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: April 3, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Sanh D. Tang, Mike N. Nguyen
  • Patent number: 8150643
    Abstract: Real-time battery impedance spectrum is acquired using a one-time record. Fast Summation Transformation (FST) is a parallel method of acquiring a real-time battery impedance spectrum using a one-time record that enables battery diagnostics. An excitation current to a battery is a sum of equal amplitude sine waves of frequencies that are octave harmonics spread over a range of interest. A sample frequency is also octave and harmonically related to all frequencies in the sum. The time profile of this signal has a duration that is a few periods of the lowest frequency. The voltage response of the battery, average deleted, is the impedance of the battery in the time domain. Since the excitation frequencies are known and octave and harmonically related, a simple algorithm, FST, processes the time record by rectifying relative to the sine and cosine of each frequency. Another algorithm yields real and imaginary components for each frequency.
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: April 3, 2012
    Assignees: Battelle Energy Alliance, LLC, Montana Tech of the University of Montana, Qualtech Systems, Inc.
    Inventors: John L. Morrison, William H. Morrison, Jon P. Christophersen
  • Patent number: 8148497
    Abstract: The invention provides binding molecules that specifically bind to rabies virus and are capable of neutralizing the virus. The invention further provides nucleic acid molecules encoding the binding molecules, compositions comprising the binding molecules and methods of identifying or producing the binding molecules. The binding molecules can be used in the diagnosis, prophylaxis and/or treatment of a condition resulting from rabies virus. Preferably, they can be used in the post-exposure prophylaxis of rabies.
    Type: Grant
    Filed: July 6, 2009
    Date of Patent: April 3, 2012
    Assignee: Crucell Holland B.V.
    Inventors: Alexander Berthold Hendrik Bakker, Willem Egbert Marissen, Robert Arjen Kramer, Cornelis Adriaan de Kruif
  • Patent number: 8148252
    Abstract: Methods of forming ternary III-nitride materials include epitaxially growing ternary III-nitride material on a substrate in a chamber. The epitaxial growth includes providing a precursor gas mixture within the chamber that includes a relatively high ratio of a partial pressure of a nitrogen precursor to a partial pressure of one or more Group III precursors in the chamber. Due at least in part to the relatively high ratio, a layer of ternary III-nitride material may be grown to a high final thickness with small V-pit defects therein. Semiconductor structures including such ternary III-nitride material layers are fabricated using such methods.
    Type: Grant
    Filed: March 2, 2011
    Date of Patent: April 3, 2012
    Assignee: S.O.I. Tec Silicon on Insulator Technologies
    Inventors: Christophe Figuet, Pierre Tomasini
  • Patent number: 8150157
    Abstract: A device for forming a random set of playing cards comprises a card in-feed area, a shuffling system, a card removal area, and a card reading system located within the device, the card reading system employing a complementary metal-oxide semiconductor (CMOS) sensor and a hardware component, the hardware component capable of converting signals from the CMOS sensor into vector sets and comparing the vector sets to known vectors to determine rank and suit.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: April 3, 2012
    Assignee: Shuffle Master, Inc.
    Inventors: Justin G. Downs, III, James R. Roberts, Kapilkumar N. Kulakkunnath, Vladislav Zvercov
  • Patent number: 8148197
    Abstract: A method of forming a material. The method comprises conducting an ALD layer cycle of a first metal, the ALD layer cycle comprising a reactive first metal precursor and a co-reactive first metal precursor. An ALD layer cycle of a second metal is conducted, the ALD layer cycle comprising a reactive second metal precursor and a co-reactive second metal precursor. An ALD layer cycle of a third metal is conducted, the ALD layer cycle comprising a reactive third metal precursor and a co-reactive third metal precursor. The ALD layer cycles of the first metal, the second metal, and the third metal are repeated to form a material, such as a GeSbTe material, having a desired stoichiometry. Additional methods of forming a material, such as a GeSbTe material, are disclosed, as is a method of forming a semiconductor device structure including a GeSbTe material.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: April 3, 2012
    Assignee: Micron Technology, Inc.
    Inventor: Eugene P. Marsh
  • Patent number: 8150667
    Abstract: Discrete Element Modeling (DEM) of rock subject to high confining pressures, such as in a subterranean drilling environment, may be used to predict performance of cutting structures used in drill bits and other drilling tools, as well as of the tools themselves. DEM may also be used to create “virtual” rock exhibiting specific drillability characteristics with or without specific reference to any actual rock, for purposes of assessing cutting efficiency of various cutting structure configurations and orientations, as well as of drilling tools incorporating same.
    Type: Grant
    Filed: November 29, 2007
    Date of Patent: April 3, 2012
    Assignee: Baker Hughes Incorporated
    Inventor: Leroy W. Ledgerwood, III
  • Patent number: 8148775
    Abstract: Methods of isolating gates in a semiconductor structure. In one embodiment, isolation is achieved using a spacer material in combination with fins having substantially vertical sidewalls. In another embodiment, etch characteristics of various materials utilized in fabrication of the semiconductor structure are used to increase an effective gate length (“Leffective”) and a field gate oxide. In yet another embodiment, a V-shaped trench is formed in the semiconductor structure to increase the Leffective and the field gate oxide. Semiconductor structures formed by these methods are also disclosed.
    Type: Grant
    Filed: February 4, 2010
    Date of Patent: April 3, 2012
    Assignee: Micron Technology, Inc.
    Inventors: Brent D. Gilgen, Paul Grisham, Werner Juengling, Richard H. Lane
  • Patent number: 8146683
    Abstract: A drilling assembly for drilling two or more casing sections into a subterranean formation includes a first casing bit and a second casing bit, each casing bit of different diameter affixed to a respective casing section of different diameter, at least two casing bits and the two or more casing sections arranged in a telescoping relationship. The second casing bit includes a bit body having a face on which two different types of cutting elements are disposed, the first type being cutting elements for drilling at least one subterranean formation and the second type being cutting elements for drilling through the first casing bit.
    Type: Grant
    Filed: August 28, 2008
    Date of Patent: April 3, 2012
    Assignee: Baker Hughes Incorporated
    Inventors: Eric E. McClain, John C. Thomas
  • Patent number: 8144506
    Abstract: Memory devices comprise a plurality of memory cells, each memory cell including a memory element and a selection device. A plurality of first (e.g., row) address lines can be adjacent (e.g., under) a first side of at least some cells of the plurality. A plurality of second (e.g., column) address lines extend across the plurality of row address lines, each column address line being adjacent (e.g., over) a second, opposing side of at least some of the cells. Control circuitry can be configured to selectively apply a read voltage or a write voltage substantially simultaneously to the address lines. Systems including such memory devices and methods of accessing a plurality of cells at least substantially simultaneously are also disclosed.
    Type: Grant
    Filed: June 23, 2009
    Date of Patent: March 27, 2012
    Assignee: Micron Technology, Inc.
    Inventors: David H. Wells, Jun Liu
  • Patent number: 8141490
    Abstract: A safe and arm device includes a booster base assembly having a booster base housing and a barrier. The booster base housing includes a shaft port extending substantially in line with a longitudinal axis, at least three initiator ports disposed about the axis, and a matching number of explosive transfer paths in respective communication with the at least three initiator ports. The barrier includes a matching number of fire-train transfer ports and a drive shaft. The drive shaft of the barrier is coupled within the shaft port of the booster base housing allowing the barrier to be selectively rotationally positioned about the axis into at least one of a safe position and an arm and fire position, allowing the fire-train transfer ports to be substantially aligned with the explosive transfer paths when the barrier is positioned in the arm and fire position. A booster basket assembly is also provided.
    Type: Grant
    Filed: July 23, 2010
    Date of Patent: March 27, 2012
    Assignee: Alliant Techsystems Inc.
    Inventors: Derek R. DeVries, Brent D. Madsen, Scott R. Jamison
  • Patent number: 8141875
    Abstract: Devices for handling playing cards comprise a card infeed tray, a card output tray, and a movable card storage device with multiple compartments. At least one compartment of the multiple compartments comprises a preselected and designated bonus card compartment configured for storing bonus cards. A card sensing system is configured to detect a presence of bonus cards to be transferred into the movable card storage device. A control system is programmed to selectively transfer only bonus cards into the at least one designated compartment in response to detection of bonus card presence by the card sensing system and to selectively transfer playing cards into compartments of the multiple compartments separate from the at least one designated compartment.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: March 27, 2012
    Assignee: Shuffle Master, Inc.
    Inventors: Attila Grauzer, Ernst Blaha, Peter Krenn, Paul K. Scheper
  • Patent number: RE43309
    Abstract: The invention relates to compounds exhibiting immuno-regulatory activity as determined by measuring the compound's ability to modulate production of NO by a cell. Preferred compounds include or consist of a sequence AAL AAQ AAG AAV wherein AAL is a substituted or unsubstituted non-polar amino acid selected from the group consisting of Ala and Leu; wherein AAQ is a substituted or unsubstituted amino acid selected from the group consisting of Gln, Pro, and Ala; wherein AAG is a substituted or unsubstituted amino acid Gly, and wherein AAV is a substituted or unsubstituted non-polar amino acid selected from the group consisting of Val and Ala. In one embodiment, the compound consists of a tripeptide selected from the group AQG, MTR, VVC, and mixtures thereof.
    Type: Grant
    Filed: March 17, 2011
    Date of Patent: April 10, 2012
    Assignee: Biotempt B.V.
    Inventors: Nisar Ahmed Khan, Robbert Benner