Patents Represented by Attorney Trueman H Denny
  • Patent number: 6466475
    Abstract: A magnetic memory with a uniform magnetic environment is disclosed. The magnetic memory includes dummy magnetic cells that are electrically inactive but have magnetic properties that are substantially identical to active magnetic memory cells within the magnetic memory. The active magnetic memory cells are arranged in rows and columns of an array. Some of the magnetic memory cells are positioned in an interior of the array and are surrounded on all sides by adjacent magnetic memory cells so that a cell in an interior position is exposed to a first uniform magnetic environment. Other magnetic memory cells are positioned at a perimeter of the array. The dummy magnetic cells are positioned adjacent to the magnetic memory cells at the perimeter so that the perimeter magnetic memory cells are exposed to a second uniform magnetic field that is substantially identical to the first uniform magnetic environment.
    Type: Grant
    Filed: October 31, 2001
    Date of Patent: October 15, 2002
    Assignee: Hewlett-Packard Company
    Inventor: Janice H. Nickel
  • Patent number: 6465355
    Abstract: A method of fabricating a non-perforate suspended platform on a bonded-substrate is disclosed. The method includes forming a dielectric layer on a support surface of a base substrate followed by patterning an interface surface of the dielectric layer to define a well feature. The well feature is etched until a well having a depth that leaves a thin protective layer of the dielectric layer covering the support surface. Next a platform substrate is urged into contact with the base substrate followed by annealing the base and platform substrates to fusion bond the interface surface with a mounting surface of the platform substrate. The platform substrate is thinned, to form a membrane over a sealed cavity defined by the well and the mounting surface. The membrane is patterned and etch to form a plurality of trenches that extend through the membrane to the sealed cavity and define a suspended platform and a flexure.
    Type: Grant
    Filed: April 27, 2001
    Date of Patent: October 15, 2002
    Assignee: Hewlett-Packard Company
    Inventor: David Horsley
  • Patent number: 6443557
    Abstract: A carrier frame having an aperture and a nozzle plate disposed on the carrier frame and positioned over the aperture is described. The nozzle plate has at least one nozzle formed between opposing surfaces of the nozzle plate. The carrier frame and the nozzle plate are made from materials having dissimilar thermal expansion coefficients such that the carrier frame has a thermal expansion coefficient that is less than the thermal expansion coefficient of the nozzle plate. The nozzle plate is staked to the carrier frame and then baked so that the nozzle plate shrinks during the baking process thereby becoming taught and under a state of tensile stress. The nozzle is formed in the nozzle plate after the baking process by laser ablation, for example. The nozzle thus formed has a true bore due to the taught nozzle plate and the opposed surfaces of the nozzle plate being parallel to each other.
    Type: Grant
    Filed: October 29, 1999
    Date of Patent: September 3, 2002
    Assignee: Hewlett-Packard Company
    Inventors: Alfred I-Tsung Pan, Marshall Field
  • Patent number: 6404674
    Abstract: A magnetic memory cell having read-write conductor that is wholly clad with a high magnetic permeability soft magnetic material for a pinned-on-the-fly soft ferromagnetic reference layer is disclosed. The magnetic memory cell includes a ferromagnetic data layer, an intermediate layer formed on the ferromagnetic data layer, and a soft ferromagnetic reference layer having a non-pinned orientation of magnetization formed on the intermediate layer. The soft ferromagnetic reference layer includes a read-write conductor and a ferromagnetic cladding that completely surrounds the read-write conductor to form a cladded read-write conductor. During a read operation, a read current flowing through the read-write conductor generates a read magnetic field that does not saturate the ferromagnetic cladding. During a write operation, a write current flowing through the read-write conductor generates a write magnetic field that saturates the ferromagnetic cladding and extends to the ferromagnetic data layer.
    Type: Grant
    Filed: April 2, 2001
    Date of Patent: June 11, 2002
    Assignee: Hewlett Packard Company Intellectual Property Administrator
    Inventors: Thomas C. Anthony, Manish Sharma
  • Patent number: 6388452
    Abstract: A device for sensing media thickness using capacitance measurements includes first and second supports that are moveable relative to each other and a variable capacitance capacitor comprising first and second electrodes that have a variable gap disposed between the electrodes and a dielectric medium disposed in the variable gap. The dielectric medium can be a gas or a vacuum. The first and second electrodes are disposed on a portion of the first and second supports respectively and are disposed opposite each other in substantially facing relation. The electrodes are spaced apart by a first distance. When a media whose thickness is to be measured and the supports are urged into contact with one another, the electrodes are displaced to a second distance.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: May 14, 2002
    Assignee: Hewlett-Packard Company
    Inventor: Carl E. Picciotto
  • Patent number: 6366468
    Abstract: Precision alignment of one or more parts on a common carrier is described. A self-aligned common carrier includes a carrier substrate having one or more pockets formed in the substrate. Each pocket includes a side profile formed in the pocket. A chip having an identical side profile that complements the side profile in the pocket is mounted to the carrier substrate by inserting the chip into the pocket. The complementary side profiles result in near perfect self-alignment between the chip and at least two orthogonal planes of the carrier substrate. The chip and the carrier substrate can be made from a single crystal semiconductor material and the side profiles can be formed by anisotropic etch process that selectively etches the chip and the substrate along a predetermined crystalline plane. The chip and the carrier substrate can be single crystal silicon having a (100) crystalline orientation and the side profiles can be formed by selectively etching the silicon along a (111) crystalline plane.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: April 2, 2002
    Assignee: Hewlett-Packard Company
    Inventor: Alfred I-Tsung Pan
  • Patent number: 6274463
    Abstract: A method for crystallizing an amorphous film formed on an underlying layer having an unfavorable crystalline growth morphology is disclosed. The method includes providing a favorable growth substrate and then forming a first unfavorable growth layer on a seeding surface of the favorable growth substrate. An aperture is etched in the first unfavorable growth layer so that the aperture extends through the first unfavorable growth layer down to the seeding surface thereby exposing a portion of the seeding surface. An amorphous media layer is then formed on the first unfavorable growth layer. The amorphous media layer fills the aperture and is in contact with the seeding surface of the favorable growth substrate.
    Type: Grant
    Filed: July 31, 2000
    Date of Patent: August 14, 2001
    Assignee: Hewlett-Packard Company
    Inventor: Alison Chaiken
  • Patent number: 6236590
    Abstract: An optimal write conductor layout structure for improved MRAM performance is disclosed. A write conductor layout structure for a magnetic memory cell includes a data storage layer having a first layer width in a first direction and a second layer width in a second direction. The data storage layer is positioned between a first conductor having a first width in the first direction and a second conductor having a second width in the second direction. The first and second conductors cross the data storage layer in the first and second directions respectively. The first width of the first conductor is less than the first layer width of the data storage layer and the first width of the first conductor is positioned so that the first layer width overlaps the entirety of the first width of the first conductor.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: May 22, 2001
    Assignee: Hewlett-Packard Company
    Inventors: Manoj Bhattacharyya, Thomas Anthony
  • Patent number: 6162400
    Abstract: The invention relates to a method and an apparatus for performing an assay on chemical, biochemical, or biological fluids. The apparatus includes an assay chamber for fluid reactions and a centrifugal force activated-valve for controlling fluid movement through the assay chamber. An active surface can be positioned in the assay chamber to react with fluids passed through the assay chamber. The active surface may contain biomolecular probes. The biomolecular probes can be DNA, DNA fragments, RNA, RNA fragments, reagents, protein, protein fragments, lipids, and lipid fragments. The apparatus is particularly useful when multiple reactions, dilutions, or washing steps are required to determine a final answer. The centrifugal force activated-valve provides positive control over fluid in the assay chamber and allows for repeated use of the same chamber for multiple reaction steps. The apparatus can be disposed of after an assay to eliminate potential contamination from reuse of the same apparatus.
    Type: Grant
    Filed: August 12, 1998
    Date of Patent: December 19, 2000
    Assignee: Agilent Technologies, Inc.
    Inventor: Carol T. Schembri
  • Patent number: 6081415
    Abstract: The invention relates to an apparatus for a crater-style sampling capacitor. The apparatus includes a dielectric having a smooth crater shaped input electrode on a first surface and output and guard electrodes on a second surface. A sampling capacitor is defined by the input and output electrodes, and a guard capacitor is defined by the input and guard electrodes. The edge of input electrode is positioned below the first surface to increase surface flash over voltage, further, the input electrode is curved to eliminate corona discharge at edges of the input electrode and to reduce self-heating to negligible levels. The apparatus is suitable for high-voltage radio-frequency applications, such as a mass spectrometer, or other high-voltage applications that require an accurate sampling capacitor for amplitude control and accurate sampling of radio-frequency waveforms.
    Type: Grant
    Filed: October 28, 1998
    Date of Patent: June 27, 2000
    Assignee: Agilent Technologies, Inc.
    Inventors: Robert K. Crawford, J Gerson Goldberg
  • Patent number: 6045086
    Abstract: The invention relates to a method and an apparatus for neat winding a film or the like to reduce scatterwinds. The apparatus includes a packing guide for engaging an edge of a film as the film is being wound and a support member for positioning the packing guide relative to a film pack. As the film pack is wound the packing guide aligns a circumferentially outer edge of the film with an adjacent inner edge so that scatterwinds are reduced and the film pack has a substantially planar surface.
    Type: Grant
    Filed: October 2, 1998
    Date of Patent: April 4, 2000
    Assignee: Hewlett-Packard Company
    Inventor: Albert H. Jeans
  • Patent number: 6016011
    Abstract: A dual-inlaid damascene contact having a polished surface for directly communicating an electrically conductive layer to a semiconductor layer. A dielectric layer is formed on the electrically conductive layer. A dual-inlaid cavity is formed by etching a via cavity and a contact cavity into the dielectric layer. A damascene contact is formed by depositing tungsten into the dual-inlaid cavity. Chemical-mechanical polishing is used to planarize and smooth a surface of the damascene contact until the surface is coplanar with the dielectric layer. A semiconductor layer is then deposited on the damascene contact. The semiconductor layer can be the node of an amorphous silicon P-I-N photodiode. Electrical interconnection between the node of the photodiode and the electrically conductive layer is accomplished without using an intermediate electrode, and the smooth damascene contact improves surface adhesion, reduces contact resistance, and provides a discrete connection to the semiconductor layer.
    Type: Grant
    Filed: April 27, 1999
    Date of Patent: January 18, 2000
    Assignee: Hewlett-Packard Company
    Inventors: Min Cao, Jeremy A Theil, Gary W Ray, Dietrich W Vook