Abstract: There is provided a system and method for statistical timing analysis and optimization of an electrical circuit having two or more digital elements. The system includes at least one parameter input and a statistical static timing analyzer and electrical circuit optimizer. The at least one parameter input is for receiving parameters of the electrical circuit. At least one of the parameters has at least one of a non-Gaussian probability distribution and a non-linear delay effect. The statistical static timing analyzer and electrical circuit optimizer is for calculating at least one of a signal arrival time and a signal required time for the electrical circuit using the at least one parameter and for modifying a component size of the electrical circuit to alter gate timing characteristics of the electrical circuit based upon the at least one of the signal arrival time and the signal required time.
Type:
Grant
Filed:
May 2, 2008
Date of Patent:
September 6, 2011
Assignee:
International Business Machines Corporation
Inventors:
Hongliang Chang, Sambasivan Narayan, Chandramouli Visweswariah, Vladimir Zolotov