Abstract: A technique for compressing video images uses temporary compression of blocks during compression, integrated color rotation of compressed images, direct compression of a composite video signal, and border filters to allow blocks to be compressed independently. Temporary compression reduces storage needed in an integrated circuit. An incoming frame is compressed block-by-block and placed in temporary storage. A corresponding block of a later frame is also compressed. Both blocks are decoded back into the transform domain and the two blocks are compared in the transform domain. Color rotation on compressed color information is integrated with overall compression and is performed upon the chrominance transform pyramids after transformation of the video signal rather than performing a rotation on the raw signal itself. Color rotation is performed at any stage and uses serial multiplication (shift and add) for more efficient processing, rather than using parallel multiplication.

Abstract: A system and method are disclosed for generating a transition in a laser control signal at a precise point in time. A write strategy processor is configured to input a sequence of data and to determine a transition in a laser control signal from the sequence of data. The transition is specified by a number of pulse clock units and a delay. A write pulse generator is configured to input the number of pulse clock units and the delay and to generate a transition by creating a signal having a transition at the time specified by the number of pulse clock units and delaying the transition by the specified delay.

Abstract: A haptic interface device produces a haptic display in response to a user's interaction with an environment with which the haptic interface device is associated. The invention enables the resolution of the haptic display produced by the haptic interface device to be changed by the user. In particular, the invention can be implemented so that the haptic display resolution can be changed (readily) as the user interacts with the environment using the haptic interface device. Thus, the invention can enable a user to interact with a particular environment at different levels of detail (i.e., different resolutions) and, in particular, can enable the user to immediately change from interacting with the environment at one level of detail to interacting with the environment at a different level of detail.

Abstract: The present invention provides a system and method for reducing memory requirements in a low resource computer system. Although examples herein are described in terms of embedded systems, the present invention is equally applicable to other low resource computer systems, such as palmtops, and laptops. Memory requirements, such as RAM requirements, can be reduced by combining virtual memory with a secondary memory with statically compressed contents. According to embodiments of the present invention, executable image of memory, such as the image of RAM, is compressed at image production time. The compressed image is then stored in a non-volatile memory, such as FLASH memory. At run-time, when a request identifying a virtual address is received, it is determined whether a physical address in the physical memory, such as RAM, is associated with that virtual address. If there is no physical memory associated with that virtual address, then a physical address is obtained to be associated with that virtual address.

Abstract: A system, method and article of manufacture are provided for executing a setup protocol. A camera and a visual display device are coupled to a computer. Images are generated by the camera upon activation of the camera. A series of setup tests are then conducted on the images generated by the camera to determine whether the camera and surrounding environmental elements satisfy predetermined criteria of an intended computer vision application for optimal running of the intended computer vision application on the computer. The series of setup tests comprises at least one setup test selected from a library of setup tests.

Abstract: A system and method are disclosed for transmitting signals from a digital MAC interface to a bus and for transmitting signals from a bus to a digital MAC interface. A first bus data line is modulated by holding the first bus data line at a potential when the transmit data line is in a first state and allowing the first bus data line to float when the transmit data line is in a second state when data transmission from the digital MAC interface is enabled. A second bus data line is modulated by holding the second bus data line at a potential when the transmit data line is in the second state and by allowing the second bus data line to float when the transmit data line is in the first state. One of the bus data lines are connected to a receive data line on the digital MAC interface.

Abstract: The present invention relates to providing processor redundancy in a system such as a router. According to an embodiment of the present invention, in a system having two or more processors, initialization sequence is started. During the initialization sequence, a redundancy subsystem is initialized. The redundancy subsystem identifies the projects or assignments that are to be off loaded from the primary processor to the secondary processor. According to an embodiment of the present invention, the initialization sequence is then suspended and a discovery process is performed. During the discovery process, it is determined whether the processor running the initialization sequence is a primary or a secondary processor. If it is a secondary processor, then the initialization sequence remains suspended and the secondary processor monitors the health of the primary processor until a failure of the primary processor occurs.

Abstract: A powerful, scaleable, and reconfigurable image processing system and method of processing data therein is described. This general purpose, reconfigurable engine with toroidal topology, distributed memory, and wide bandwidth I/O are capable of solving real applications at real-time speeds. The reconfigurable image processing system can be optimized to efficiently perform specialized computations, such as real-time video and audio processing. This reconfigurable image processing system provides high performance via high computational density, high memory bandwidth, and high I/O bandwidth. Generally, the reconfigurable image processing system and its control structure include a homogeneous array of 16 field programmable gate arrays (FPGA) and 16 static random access memories (SRAM) arranged in a partial torus configuration. The reconfigurable image processing system also includes a PCI bus interface chip, a clock control chip, and a datapath chip. It can be implemented in a single board.

Abstract: The present invention relates to providing processor redundancy in a system such as a router. According to an embodiment of the present invention, when a primary processor is about to crash in a system having two or more processors, the imminent crash is identified prior to the occurrence of the actual crash. The primary processor sends a message to the secondary processor to indicate that it is crashing. The primary also sets a timer to determine a period of time to wait prior to crashing. When the secondary processor receives the message from the primary processor, the secondary processor becomes the new primary processor. The new primary processor then sends an acknowledgement to the old primary processor. The old primary processor crashes and reboots as the new secondary processor.

Abstract: Techniques from computer vision and computer graphics are combined to robustly track a target (e.g., a user) and perform a function based upon the image and/or the identity attributed to the target's face. Three primary modules are used to track a user's head: depth estimation, color segmentation, and pattern classification. The combination of these three techniques allows for robust performance despite unknown background, crowded conditions, and rapidly changing pose or expression of the user. Each of the modules can also provide an identity classification module with valuable information so that the identity of a user can be estimated. With an estimate of the position of a target in 3-D and the target's identity, applications such as individualized computer programs or graphics techniques to distort and/or morph the shape or apparent material properties of the user's face can be performed.

Abstract: An embodiment of the present invention is a system and method for measuring round trip times in a network, such as the Internet, by utilizing a packet, such as a transmission control protocol (TCP) packet. The TCP packet may be a packet which is typically utilized during establishment of a reliable connection, such as a SYN or a SYN ACK. According to an embodiment of the present invention, a mirrored service is selected for a client by sending the TCP packet from an approximate location of each of the mirrored service to an approximate location of the client. A response is then received by each mirrored service from the approximate location of the client, and a round trip time for each mirrored service is measured from the time the TCP packet was sent to the time the response was received. The various round trip times of each mirrored service are compared with each other and a best round trip time, such as the shortest time, is selected.

Abstract: The present invention teaches a variety of methods and systems for providing computer/human interfaces. According to one method, the user interfaces with an electronic device such as a computer system by engaging a sensor with desired regions of an encoded physical medium. The encoded physical medium is preferably chosen to provide intuitive meaning to the user, and is thus an improved metaphor for interfacing with the computer system. Suitable examples of the encoded physical medium include a data-linked book, magazine, globe, or article of clothing. Some or all of the selected regions have had certain information encoded therein, information suitable for interfacing and controlling the computer system. When the user engages the sensor with a region having certain encoded information, the certain encoded information is interpreted and an appropriate action taken. For example, the sensor or the computer system may provide suitable feedback to the user.

Abstract: Accordingly, the present invention provides a method and an apparatus of establishing multiple direct memory access connections between a peripheral and a main memory of a computer system. Each of the multiple direct memory access connection is managed in an improved manner such that one or more of the multiple direct memory access connections are non-real-time connections, but real-time operations may be performed the data carried by the non-real time connections. In another aspect of the present invention, a driver may be implemented on the computer system to facilitate the establishment and maintenance of the multiple direct memory access connections. The present inventions reduce arbitration and system interrupt latencies and reduces the management burden of the direct memory access connections on a central processing unit of the computer system.

Abstract: An automatically activated bus termination circuit in a repeater that is suitable for inclusion in a repeater stack including an end unit determination circuit is described. The end unit determination circuit includes a local input connector having an input sense pin. The input sense pin is configured to be connected to an input sense potential when the local input connector is connected to a remote output connector. A local output connector has an output sense pin. The output sense pin is configured to be connected to an output sense potential when the local output connector is connected to a remote input connector. A bus termination circuit is configured to be active when either the input sense pin is not connected to the input sense potential or the output sense pin is not connected to the output sense potential.

Abstract: The present invention provides a protection protocol for fault recovery, such as a ring wrap, for a network, such as a two line bidirectional ring network. An embodiment of the present invention works in conjunction with a ring topology network in which a node in the network can identify a problem with a connection between the node and a first neighbor. The present invention provides a protection protocol which simplifies the coordination required by the nodes in a ring network. The nodes do not need to maintain a topology map of the ring, identifying and locating each node on the ring, for effective protection. Additionally, independently operating ring networks can be merged and the protection protocol will appropriately remove a protection, such as a ring wrap, to allow the formation of a single ring.

Abstract: A short range inductively coupled wireless communication system employs analog frequency modulation of a high frequency carrier and magnetic coupling between a transmitting antenna and a receiving antenna. A transmitter coupled to the transmitting antenna modulates multiple high-fidelity analog audio signals and digital control messages onto separate high frequency (“HF”) carriers. The electric field portion of the transmitted electromagnetic field is substantially eliminated during transmission, while the magnetic field portion is substantially unaffected. The receiving antenna is coupled to a demodulator which reproduces the audio frequency signals and decodes control messages sent by the transmitter.

Abstract: Disclosed is a position detection system for determining a state of a physical object. The position detection system includes a platform and a physical object positioned adjacent to the platform. The physical object has an object state that is changeable. The position detection system also includes a first resonator having a first resonator position state. The first resonator is arranged such that a change in the object state causes a change in the first resonator position state and such that the first resonator position state is different from the object state. The first resonator is further arranged to output a resonator signal that is associated with the first resonator position state when an excitation signal with a predetermined frequency range is received by the first resonator.

Abstract: A background subtraction apparatus of the present invention includes a key point locator for locating key points on a known object type, a boundary point locator for locating boundary points of the known object that make up the edges of the known object, and an edge processor for processing the edges to provide a clean-edged extraction of the known object from a background image. Preferably, the key point locator includes an alignment detector for detecting alignment of an image of the known object type with a skeleton image. Still more preferably, the skeleton image is an exoskeleton image and the known object type is a human being.

Abstract: The present invention teaches a computer interface system for providing content to a user using at least two encoded hotspots. A first hotspot is a context hotspot which activates functions in the computer system, selects databases and/or sets selection criteria. A second, content, hotspot is decoded based on its encoded information as well as the information decoded from the context hotspot. Content of the second hotspot includes direction and indirection content and may access data or executable programs.

Abstract: The deferred scanline converter system in accordance with the present invention receives triangle data from a front end processor, identifies the triangles that are in competition for a given pixel location, and determines the winning triangle from among the competing triangles to generate the pixel for that pixel location. The system includes a triangle buffer write logic and a scan-out logic. The triangle buffer write logic initially receives triangle data, re-orients the triangle data to top, middle, and bottom vertices, and writes the triangle data to the triangle buffer in accordance with a triangle buffer writing scheme. The writing scheme uses a coverage mask to limit the number of triangles in competition for a given pixel location (i.e., if a triangle cannot be written to the triangle buffer within the confines of the coverage mask, it will be discarded).