Abstract: A phase detector customized for Clock Synthesis Unit (CSU) is disclosed. The phase detector improves jitter performance by providing minimal activity on VCO control lines and pushing ripple frequency to one octave higher, while maintaining wide linear characteristic. Moreover, it provides a frequency-scalable circuit that unlike a conventional phase-and-frequency detector (PFD), does not rely on asynchronous elements.
Type:
Grant
Filed:
March 27, 2002
Date of Patent:
August 8, 2006
Assignee:
PMC-Sierra Ltd.
Inventors:
Hormoz Djahanshahi, Graeme Boyd, Victor Lee